I like that option the best so far. I'll assume that's what we're doing unless I suddenly think of a compelling reason not to or if someone doesn't like it.
Generally speaking, I don't consider myself qualified to make the necessary changes to the memory system stuff, especially the caches. Can someone please volunteer? I can start working on the ISA stuff maybe tonight or maybe tomorrow. A shared (queue) repository would probably be a good idea. Gabe Quoting Steve Reinhardt <ste...@gmail.com>: > Here's another option: make the CPU model smart and when it sees a > "lock" access have it keep running until it sees an "unlock" access. > This might not be too bad if "keep running" could be implemented > simply by doing something like a recursive tail call to tick(). > > Steve > _______________________________________________ > m5-dev mailing list > m5-dev@m5sim.org > http://m5sim.org/mailman/listinfo/m5-dev > _______________________________________________ m5-dev mailing list m5-dev@m5sim.org http://m5sim.org/mailman/listinfo/m5-dev
