Gabe, briefly can you talk about what you're big push is going to be on? I'm really scrambling to get these MIPS fixes in for O3 since a major culprit of it getting continually broken is the lack of a regression test. People (including me) can change stuff and unknowingly break MIPS code. Then, I'm back to fixing what already should be working.
If possible, give me a day (hopefully will be quick) to finish cleaning up this MIPS stuff so that I can include that in the testing of whatever changes you have. Or maybe the changes you have dont affect this but I'm not sure yet since I dont have the exact fix for the MIPS code. On Thu, Apr 16, 2009 at 3:19 AM, Gabe Black <gbl...@eecs.umich.edu> wrote: > I'm going to be pushing a lot of stuff soon, so please hold off on > pushing into the repository until that happens. I'm going to almost > empty my queue, but there's a hack in there to set up the Intel MP table > and maybe one or two other spots so that it has the right information > for more than one CPU. I'd like to start a discussion about the right > way to build those tables/gather system wide configuration information > on the python side. Ali, I remember you wanted something along these > lines for SPARC_FS at one point. Could you explain what you'd need for that? > > Gabe > _______________________________________________ > m5-dev mailing list > m5-dev@m5sim.org > http://m5sim.org/mailman/listinfo/m5-dev > -- ---------- Korey L Sewell Graduate Student - PhD Candidate Computer Science & Engineering University of Michigan _______________________________________________ m5-dev mailing list m5-dev@m5sim.org http://m5sim.org/mailman/listinfo/m5-dev
