This changeset comments out a lot of code instead of just deleting it.
 Please fix.

On Sat, Dec 12, 2009 at 2:37 PM, Brad Beckmann <brad.beckm...@amd.com> wrote:
> # HG changeset patch
> # User Brad Beckmann <brad.beckm...@amd.com>
> # Date 1260657435 28800
> # Node ID 2811007a9adc2edc51fdd303909662a852186d52
> # Parent  7cecf4257a724ff3ad529e48f2fd3f2c32872cf4
> ruby: connects sm queues to the network
>
> diff -r 7cecf4257a72 -r 2811007a9adc configs/example/memtest-ruby.py
> --- a/configs/example/memtest-ruby.py   Sat Dec 12 14:37:15 2009 -0800
> +++ b/configs/example/memtest-ruby.py   Sat Dec 12 14:37:15 2009 -0800
> @@ -104,15 +104,21 @@
>     latency = 15
>     size = 1048576
>
> -# It would be nice to lump all the network nodes into a single list,
> -# but for consistency with the old scripts I'm segregating them by
> -# type.  I'm not sure if this is really necessary or not.
> +#
> +# The ruby network creation expects the list of nodes in the system to be
> +# consistent with the NetDest list.  Therefore the l1 controller nodes must 
> be
> +# listed before the directory nodes and directory nodes before dma nodes, 
> etc.
> +#
>
>  # net_nodes = []
>  l1_cntrl_nodes = []
>  dir_cntrl_nodes = []
>
> -for cpu in cpus:
> +#
> +# Must create the individual controllers before the network to ensure the
> +# controller constructors are called before the network constructor
> +#
> +for (i, cpu) in enumerate(cpus):
>     l1_cntrl = L1Cache_Controller()
>     cpu_seq = RubySequencer(controller = l1_cntrl,
>                             icache = L1Cache(controller = l1_cntrl),
> @@ -131,6 +137,10 @@
>     l1_cntrl_nodes.append(l1_cntrl)
>     dir_cntrl_nodes.append(dir_cntrl)
>
> +#
> +# Important: the topology constructor must be called before the network
> +# constructor.
> +#
>  network = SimpleNetwork(topology = makeCrossbar(l1_cntrl_nodes + \
>                                                 dir_cntrl_nodes))
>
> diff -r 7cecf4257a72 -r 2811007a9adc src/mem/ruby/network/Network.cc
> --- a/src/mem/ruby/network/Network.cc   Sat Dec 12 14:37:15 2009 -0800
> +++ b/src/mem/ruby/network/Network.cc   Sat Dec 12 14:37:15 2009 -0800
> @@ -28,6 +28,7 @@
>
>  #include "mem/protocol/MachineType.hh"
>  #include "mem/ruby/network/Network.hh"
> +#include "mem/ruby/network/simple/Topology.hh"
>
>  Network::Network(const Params *p)
>     : SimObject(p)
> @@ -40,13 +41,25 @@
>     m_link_latency = p->link_latency;
>     m_control_msg_size = p->control_msg_size;
>
> +    //
> +    // Total nodes/controllers in network
> +    // Must make sure this is called after the State Machine constructors
> +    //
> +    m_nodes = MachineType_base_number(MachineType_NUM);
> +    assert(m_nodes != 0);
> +
>     assert(m_virtual_networks != 0);
>     assert(m_topology_ptr != NULL);
> +
> +    //
> +    // Initialize the controller's network pointers
> +    //
> +    m_topology_ptr->initNetworkPtr(this);
>  }
>
>  void Network::init()
>  {
> -  m_nodes = MachineType_base_number(MachineType_NUM); // Total nodes in 
> network
> +//   m_nodes = MachineType_base_number(MachineType_NUM); // Total nodes in 
> network
>
>   m_data_msg_size = RubySystem::getBlockSizeBytes() + m_control_msg_size;
>  }
> diff -r 7cecf4257a72 -r 2811007a9adc 
> src/mem/ruby/network/simple/SimpleNetwork.cc
> --- a/src/mem/ruby/network/simple/SimpleNetwork.cc      Sat Dec 12 14:37:15 
> 2009 -0800
> +++ b/src/mem/ruby/network/simple/SimpleNetwork.cc      Sat Dec 12 14:37:15 
> 2009 -0800
> @@ -62,13 +62,12 @@
>  SimpleNetwork::SimpleNetwork(const Params *p)
>     : Network(p)
>  {
> -}
> -
> -void SimpleNetwork::init()
> -{
> -
> -  Network::init();
> -
> +  //
> +  // Note: the parent Network Object constructor is called before the
> +  // SimpleNetwork child constructor.  Therefore, the member variables
> +  // used below should already be initialized.
> +  //
> +
>   m_endpoint_switches.setSize(m_nodes);
>
>   m_in_use.setSize(m_virtual_networks);
> @@ -91,10 +90,45 @@
>                    "fromNet node "+int_to_string(node)+" j 
> "+int_to_string(j));
>     }
>   }
> +}
> +
> +void SimpleNetwork::init()
> +{
> +
> +  Network::init();
> +
> +//   m_endpoint_switches.setSize(m_nodes);
> +
> +//   m_in_use.setSize(m_virtual_networks);
> +//   m_ordered.setSize(m_virtual_networks);
> +//   for (int i = 0; i < m_virtual_networks; i++) {
> +//     m_in_use[i] = false;
> +//     m_ordered[i] = false;
> +//   }
> +
> +//   // Allocate to and from queues
> +//   m_toNetQueues.setSize(m_nodes);
> +//   m_fromNetQueues.setSize(m_nodes);
> +//   for (int node = 0; node < m_nodes; node++) {
> +//     m_toNetQueues[node].setSize(m_virtual_networks);
> +//     m_fromNetQueues[node].setSize(m_virtual_networks);
> +//     for (int j = 0; j < m_virtual_networks; j++) {
> +//       m_toNetQueues[node][j] = new MessageBuffer(
> +//                    "toNet node "+int_to_string(node)+" j 
> "+int_to_string(j));
> +//       m_fromNetQueues[node][j] = new MessageBuffer(
> +//                    "fromNet node "+int_to_string(node)+" j 
> "+int_to_string(j));
> +//     }
> +//   }
>
>   // Setup the network switches
>   //  m_topology_ptr = new Topology(this, m_nodes);
> -  m_topology_ptr->makeTopology();
> +  // m_topology_ptr->makeTopology();
> +
> +  //
> +  // The topology pointer should have already been initialized in the parent
> +  // class network constructor.
> +  //
> +  assert(m_topology_ptr != NULL);
>   int number_of_switches = m_topology_ptr->numSwitches();
>   for (int i=0; i<number_of_switches; i++) {
>     m_switch_ptr_vector.insertAtBottom(new Switch(i, this));
> diff -r 7cecf4257a72 -r 2811007a9adc src/mem/ruby/network/simple/Topology.cc
> --- a/src/mem/ruby/network/simple/Topology.cc   Sat Dec 12 14:37:15 2009 -0800
> +++ b/src/mem/ruby/network/simple/Topology.cc   Sat Dec 12 14:37:15 2009 -0800
> @@ -68,24 +68,110 @@
>  {
>     m_print_config = p->print_config;
>     m_number_of_switches = p->num_int_nodes;
> -  // initialize component latencies record
> -  m_component_latencies.setSize(0);
> -  m_component_inter_switches.setSize(0);
> +    // initialize component latencies record
> +    m_component_latencies.setSize(0);
> +    m_component_inter_switches.setSize(0);
> +
> +    //
> +    // Total nodes/controllers in network
> +    // Must make sure this is called after the State Machine constructors
> +    //
> +    m_nodes = MachineType_base_number(MachineType_NUM);
> +    assert(m_nodes > 1);
> +
> +    if (m_nodes != params()->ext_links.size()) {
> +        fatal("m_nodes (%d) != ext_links vector length (%d)\n",
> +              m_nodes != params()->ext_links.size());
> +    }
> +
> +    //Vector<Abstract> endpointConnectionExist;  // used to ensure all 
> endpoints are connected to the network
> +
> +    //
> +    // First create the links between the endpoints (i.e. controllers) and 
> the
> +    // network.
> +    //
> +    for (vector<ExtLink*>::const_iterator i = params()->ext_links.begin();
> +         i != params()->ext_links.end(); ++i)
> +      {
> +        const ExtLinkParams *extParams = (*i)->params();
> +        AbstractController *cntrl = extParams->ext_node;
> +
> +        //
> +        // Store the controller pointers so that we can later pass them
> +        // the network pointer
> +        //
> +        m_controller_vector.insertAtBottom(cntrl);
> +
> +        //
> +        // Now calculate the correct ids for the external to internal links
> +        //
> +        int ext_idx1 =
> +          MachineType_base_number(cntrl->getMachineType()) + 
> cntrl->getVersion();
> +        int ext_idx2 = ext_idx1 + m_nodes;
> +        int int_idx = extParams->int_node + 2*m_nodes;
> +
> +        //
> +        // create the links in both directions
> +        //
> +        addLink(ext_idx1,
> +                int_idx,
> +                extParams->latency,
> +                extParams->bw_multiplier,
> +                extParams->weight);
> +
> +        addLink(int_idx,
> +                ext_idx2,
> +                extParams->latency,
> +                extParams->bw_multiplier,
> +                extParams->weight);
> +      }
> +
> +    //
> +    // Now create the internal network links
> +    //
> +    for (vector<IntLink*>::const_iterator i = params()->int_links.begin();
> +         i != params()->int_links.end(); ++i)
> +      {
> +        const IntLinkParams *intParams = (*i)->params();
> +        int node_a_id = intParams->node_a + 2*m_nodes;
> +        int node_b_id = intParams->node_b + 2*m_nodes;
> +
> +        addLink(node_a_id,
> +                node_b_id,
> +                intParams->latency,
> +                intParams->bw_multiplier,
> +                intParams->weight);
> +
> +        addLink(node_b_id,
> +                node_a_id,
> +                intParams->latency,
> +                intParams->bw_multiplier,
> +                intParams->weight);
> +      }
> +
>  }
>
>  void Topology::init()
>  {
> -    // need to defer this until init, to guarantee that constructors
> -    // for all the controller objects have been called.
> -    m_nodes = MachineType_base_number(MachineType_NUM);
> +//     // need to defer this until init, to guarantee that constructors
> +//     // for all the controller objects have been called.
> +//     m_nodes = MachineType_base_number(MachineType_NUM);
> +}
> +
> +void Topology::initNetworkPtr(Network* net_ptr)
> +{
> +    for (int cntrl = 0; cntrl < m_controller_vector.size(); cntrl++)
> +      {
> +        m_controller_vector[cntrl]->initNetworkPtr(net_ptr);
> +      }
>  }
>
>  void Topology::makeTopology()
>  {
> -    if (m_nodes != params()->ext_links.size()) {
> -        fatal("m_nodes (%d) != ext_links vector length (%d)\n",
> -              m_nodes != params()->ext_links.size());
> -    }
> +//     if (m_nodes != params()->ext_links.size()) {
> +//         fatal("m_nodes (%d) != ext_links vector length (%d)\n",
> +//               m_nodes != params()->ext_links.size());
> +//     }
>
>
>
> @@ -97,14 +183,14 @@
>     return;
>   }
>   */
> -  assert(m_nodes > 1);
> +//   assert(m_nodes > 1);
>
> -  Vector< Vector < SwitchID > > nodePairs;  // node pairs extracted from the 
> file
> -  Vector<int> latencies;  // link latencies for each link extracted
> -  Vector<int> bw_multis;  // bw multipliers for each link extracted
> -  Vector<int> weights;  // link weights used to enfore e-cube deadlock free 
> routing
> -  Vector< SwitchID > int_network_switches;  // internal switches extracted 
> from the file
> -  Vector<bool> endpointConnectionExist;  // used to ensure all endpoints are 
> connected to the network
> +//   Vector< Vector < SwitchID > > nodePairs;  // node pairs extracted from 
> the file
> +//   Vector<int> latencies;  // link latencies for each link extracted
> +//   Vector<int> bw_multis;  // bw multipliers for each link extracted
> +//   Vector<int> weights;  // link weights used to enfore e-cube deadlock 
> free routing
> +//   Vector< SwitchID > int_network_switches;  // internal switches 
> extracted from the file
> +//   Vector<bool> endpointConnectionExist;  // used to ensure all endpoints 
> are connected to the network
>
>  #if 0
>   endpointConnectionExist.setSize(m_nodes);
> @@ -229,29 +315,29 @@
>   }
>  #endif
>
> -  for (vector<ExtLink*>::const_iterator i = params()->ext_links.begin();
> -       i != params()->ext_links.end(); ++i)
> -  {
> -      const ExtLinkParams *p = (*i)->params();
> -      AbstractController *c = p->ext_node;
> -      int ext_idx1 =
> -          MachineType_base_number(c->getMachineType()) + c->getVersion();
> -      int ext_idx2 = ext_idx1 + m_nodes;
> -      int int_idx = p->int_node + 2*m_nodes;
> +//   for (vector<ExtLink*>::const_iterator i = params()->ext_links.begin();
> +//        i != params()->ext_links.end(); ++i)
> +//   {
> +//       const ExtLinkParams *p = (*i)->params();
> +//       AbstractController *c = p->ext_node;
> +//       int ext_idx1 =
> +//           MachineType_base_number(c->getMachineType()) + c->getVersion();
> +//       int ext_idx2 = ext_idx1 + m_nodes;
> +//       int int_idx = p->int_node + 2*m_nodes;
>
> -      addLink(ext_idx1, int_idx, p->latency, p->bw_multiplier, p->weight);
> -      addLink(int_idx, ext_idx2, p->latency, p->bw_multiplier, p->weight);
> -  }
> +//       addLink(ext_idx1, int_idx, p->latency, p->bw_multiplier, p->weight);
> +//       addLink(int_idx, ext_idx2, p->latency, p->bw_multiplier, p->weight);
> +//   }
>
> -  for (vector<IntLink*>::const_iterator i = params()->int_links.begin();
> -       i != params()->int_links.end(); ++i)
> -  {
> -      const IntLinkParams *p = (*i)->params();
> -      int a = p->node_a + 2*m_nodes;
> -      int b = p->node_b + 2*m_nodes;
> -      addLink(a, b, p->latency, p->bw_multiplier, p->weight);
> -      addLink(b, a, p->latency, p->bw_multiplier, p->weight);
> -  }
> +//   for (vector<IntLink*>::const_iterator i = params()->int_links.begin();
> +//        i != params()->int_links.end(); ++i)
> +//   {
> +//       const IntLinkParams *p = (*i)->params();
> +//       int a = p->node_a + 2*m_nodes;
> +//       int b = p->node_b + 2*m_nodes;
> +//       addLink(a, b, p->latency, p->bw_multiplier, p->weight);
> +//       addLink(b, a, p->latency, p->bw_multiplier, p->weight);
> +//   }
>  }
>
>
> diff -r 7cecf4257a72 -r 2811007a9adc src/mem/ruby/network/simple/Topology.hh
> --- a/src/mem/ruby/network/simple/Topology.hh   Sat Dec 12 14:37:15 2009 -0800
> +++ b/src/mem/ruby/network/simple/Topology.hh   Sat Dec 12 14:37:15 2009 -0800
> @@ -102,6 +102,8 @@
>   int numSwitches() const { return m_number_of_switches; }
>   void createLinks(Network *net, bool isReconfiguration);
>
> +  void initNetworkPtr(Network* net_ptr);
> +
>   const string getName() { return m_name; }
>   void printStats(ostream& out) const {}
>   void clearStats() {}
> @@ -129,6 +131,8 @@
>   NodeID m_nodes;
>   int m_number_of_switches;
>
> +  Vector<AbstractController*> m_controller_vector;
> +
>   Vector<SwitchID> m_links_src_vector;
>   Vector<SwitchID> m_links_dest_vector;
>   Vector<int> m_links_latency_vector;
> diff -r 7cecf4257a72 -r 2811007a9adc 
> src/mem/ruby/slicc_interface/AbstractController.hh
> --- a/src/mem/ruby/slicc_interface/AbstractController.hh        Sat Dec 12 
> 14:37:15 2009 -0800
> +++ b/src/mem/ruby/slicc_interface/AbstractController.hh        Sat Dec 12 
> 14:37:15 2009 -0800
> @@ -8,6 +8,7 @@
>  #include "mem/ruby/common/Consumer.hh"
>  #include "mem/protocol/MachineType.hh"
>  #include "mem/ruby/common/Address.hh"
> +#include "mem/ruby/network/Network.hh"
>
>  class MessageBuffer;
>  class Network;
> @@ -27,6 +28,7 @@
>   virtual void set_atomic(Address addr) = 0;
>   virtual void started_writes() = 0;
>   virtual void clear_atomic() = 0;
> +  virtual void initNetworkPtr(Network* net_ptr) = 0;
>
>   virtual void print(ostream & out) const = 0;
>   virtual void printStats(ostream & out) const = 0;
> diff -r 7cecf4257a72 -r 2811007a9adc src/mem/slicc/symbols/StateMachine.py
> --- a/src/mem/slicc/symbols/StateMachine.py     Sat Dec 12 14:37:15 2009 -0800
> +++ b/src/mem/slicc/symbols/StateMachine.py     Sat Dec 12 14:37:15 2009 -0800
> @@ -209,6 +209,7 @@
>     const string toString() const;
>     const string getName() const;
>     const MachineType getMachineType() const;
> +    void initNetworkPtr(Network* net_ptr) { m_net_ptr = net_ptr; }
>     void print(ostream& out) const;
>     void printConfig(ostream& out) const;
>     void wakeup();
> @@ -361,13 +362,8 @@
>
>  void $c_ident::init()
>  {
> -    m_net_ptr = net_ptr;
>     m_machineID.type = MachineType_${ident};
>     m_machineID.num = m_version;
> -    for (size_t i = 0; i < argv.size(); i += 2) {
> -        if (argv[i] != "version")
> -            m_cfg[argv[i]] = argv[i+1];
> -    }
>
>     // Objects
>     s_profiler.setVersion(m_version);
>
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