# HG changeset patch # User Brad Beckmann <brad.beckm...@amd.com> # Date 1260657436 28800 # Node ID 9bc2d1989135d514762556074847b27e503eda04 # Parent d0e96be22141976017c9d11e942be11587b8e4e2 ruby: removed some commented out code Removed some commented out code from the sequencer and system that is no longer needed with the new configuration system.
diff -r d0e96be22141 -r 9bc2d1989135 src/mem/ruby/system/Sequencer.cc --- a/src/mem/ruby/system/Sequencer.cc Sat Dec 12 14:37:16 2009 -0800 +++ b/src/mem/ruby/system/Sequencer.cc Sat Dec 12 14:37:16 2009 -0800 @@ -62,7 +62,6 @@ Sequencer::Sequencer(const Params *p) : RubyPort(p), deadlockCheckEvent(this) { - //m_deadlock_check_scheduled = false; m_outstanding_count = 0; m_max_outstanding_requests = 0; @@ -130,10 +129,7 @@ if (m_outstanding_count > 0) { // If there are still outstanding requests, keep checking schedule(deadlockCheckEvent, (m_deadlock_threshold * g_eventQueue_ptr->getClock()) + curTick); - //g_eventQueue_ptr->scheduleEvent(this, m_deadlock_threshold); - } // else { -// m_deadlock_check_scheduled = false; -// } + } } void Sequencer::printProgress(ostream& out) const{ @@ -195,10 +191,6 @@ if (deadlockCheckEvent.scheduled() == false) { schedule(deadlockCheckEvent, m_deadlock_threshold); } -// if (m_deadlock_check_scheduled == false) { -// g_eventQueue_ptr->scheduleEvent(this, m_deadlock_threshold); -// m_deadlock_check_scheduled = true; -// } Address line_addr(request->ruby_request.paddr); line_addr.makeLineAddress(); diff -r d0e96be22141 -r 9bc2d1989135 src/mem/ruby/system/System.cc --- a/src/mem/ruby/system/System.cc Sat Dec 12 14:37:16 2009 -0800 +++ b/src/mem/ruby/system/System.cc Sat Dec 12 14:37:16 2009 -0800 @@ -107,127 +107,10 @@ m_profiler_ptr = p->profiler; m_tracer_ptr = p->tracer; - //assert( g_debug_ptr != NULL); g_eventQueue_ptr = new RubyEventQueue(p->eventq, m_clock); g_system_ptr = this; m_mem_vec_ptr = new MemoryVector; m_mem_vec_ptr->setSize(m_memory_size_bytes); - - /* object contruction is broken into two steps (Constructor and init) to avoid cyclic dependencies - * e.g. a sequencer needs a pointer to a controller and a controller needs a pointer to a sequencer - */ - -#if 0 - vector<string> memory_control_names; - - for (size_t i=0;i<sys_conf.size(); i++) { - const string & type = sys_conf[i].type; - const string & name = sys_conf[i].name; - if (type == "System" || type == "Debug") - continue; - // else if (type == "SetAssociativeCache") - // m_caches[name] = new CacheMemory(name); -// else if (type == "DirectoryMemory") { -// m_directories[name] = new DirectoryMemory(name); -// else if (type == "Sequencer") { -// m_sequencers[name] = new Sequencer(name); -// m_ports[name] = m_sequencers[name]; -// } else if (type == "DMASequencer") { -// m_dma_sequencers[name] = new DMASequencer(name); -// m_ports[name] = m_dma_sequencers[name]; - } else if (type == "Topology") { - assert(m_topologies.size() == 0); // only one toplogy at a time is supported right now - m_topologies[name] = new Topology(name); - } else if (type == "SimpleNetwork") { - assert(m_network_ptr == NULL); // only one network at a time is supported right now - m_network_ptr = new SimpleNetwork(name); -// } else if (type.find("generated") == 0) { -// string controller_type = type.substr(10); -// m_controllers[name] = ControllerFactory::createController(controller_type, name); -// printf ("ss: generated %s \n", controller_type); -//added by SS -// } else if (type == "Tracer") { - //m_tracers[name] = new Tracer(name); -// m_tracer_ptr = new Tracer(name); -// } else if (type == "Profiler") { -// m_profiler_ptr = new Profiler(name); - } else if (type == "GarnetNetwork") { - assert(m_network_ptr == NULL); // only one network at a time is supported right now - m_network_ptr = new GarnetNetwork(name); - } else if (type == "GarnetNetwork_d") { - assert(m_network_ptr == NULL); // only one network at a time is supported right now - m_network_ptr = new GarnetNetwork_d(name); - } else if (type == "MemoryControl") { - m_memorycontrols[name] = new MemoryControl(name); - memory_control_names.push_back (name); - } else { - cerr << "Error: Unknown object type -- " << type << endl; - assert(0); - } - } - - for (size_t i=0;i<sys_conf.size(); i++) { - string type = sys_conf[i].type; - string name = sys_conf[i].name; - const vector<string> & argv = sys_conf[i].argv; - if (type == "Topology") - m_topologies[name]->init(argv); - } - - for (size_t i=0;i<sys_conf.size(); i++) { - string type = sys_conf[i].type; - string name = sys_conf[i].name; - const vector<string> & argv = sys_conf[i].argv; - if (type == "SimpleNetwork" || type == "GarnetNetwork" || type == "GarnetNetwork_d"){ - m_network_ptr->init(argv); - } - } - - for (size_t i=0;i<sys_conf.size(); i++) { - string type = sys_conf[i].type; - string name = sys_conf[i].name; - const vector<string> & argv = sys_conf[i].argv; - if (type == "MemoryControl" ){ - m_memorycontrols[name]->init(argv); - } - } - - for (size_t i=0;i<sys_conf.size(); i++) { - string type = sys_conf[i].type; - string name = sys_conf[i].name; - const vector<string> & argv = sys_conf[i].argv; - if (type == "System" || type == "Debug") - continue; - else if (type == "SetAssociativeCache") - m_caches[name]->init(argv); - else if (type == "DirectoryMemory") - m_directories[name]->init(argv); - else if (type == "MemoryControl") - continue; - else if (type == "Sequencer") - m_sequencers[name]->init(argv); - else if (type == "DMASequencer") - m_dma_sequencers[name]->init(argv); - else if (type == "Topology") - continue; - else if (type == "SimpleNetwork" || type == "GarnetNetwork" || type == "GarnetNetwork_d") - continue; - else if (type.find("generated") == 0) { - string controller_type = type.substr(11); - m_controllers[name]->init(m_network_ptr, argv); - } -//added by SS - else if (type == "Tracer") - //m_tracers[name]->init(argv); - m_tracer_ptr->init(argv); - else if (type == "Profiler") - m_profiler_ptr->init(argv, memory_control_names); -// else if (type == "MI_example"){ -// } - else - assert(0); - } -#endif } _______________________________________________ m5-dev mailing list m5-dev@m5sim.org http://m5sim.org/mailman/listinfo/m5-dev