Good points, Sorry about that. As the comment says, that's just a stat that I was using a while back for debugging but cluttered things up when I was looking at the "real" processor stats.
maybe a "#if 0" will do or I can just get rid of them altogether. I'm leaning toward the former though as they are useful for "deep" debugging of the model. Does anybody care if I just "#if 0" that? If not, I'll knock that out and commit soon. On Fri, Jun 25, 2010 at 5:14 PM, Steve Reinhardt <[email protected]> wrote: > Hi Korey, > > You really threw me for a loop with this one... I was testing out a > simple change, which I often do using m5.debug since it compiles > faster, and the inorder tests kept failing. I could see that it was > due to some changes you made recently, but I had pulled both the code > changes and the stats updates, and the regressions on zizzer were > passing, so I was stumped. Then I looked more closely at your > changes... the bottom line is that you can't have stats that depend on > how the binary is compiled, as that messes up our regression framework > which expects all versions of m5 to get the same output for the test > runs. > > If you want, you can use some other flag to ifdef them, or maybe just > get rid of them entirely knowing that you can resurrect them out of > the hg archive if you need to. > > Thanks, > > Steve > > On Wed, Jun 23, 2010 at 3:26 PM, Korey Sewell <[email protected]> wrote: > > changeset 128cce9f92bc in /z/repo/m5 > > details: http://repo.m5sim.org/m5?cmd=changeset;node=128cce9f92bc > > description: > > inorder-stats: add instruction type stats > > also, remove inst-req stats as default.good for debugging > > but in terms of pure processor stats they aren't useful > > > [...] > > diff -r e3311623d9f0 -r 128cce9f92bc src/cpu/inorder/resource.cc > > --- a/src/cpu/inorder/resource.cc Wed Jun 23 18:15:23 2010 -0400 > > +++ b/src/cpu/inorder/resource.cc Wed Jun 23 18:18:20 2010 -0400 > > @@ -79,11 +79,13 @@ > > void > > Resource::regStats() > > { > > +#ifdef DEBUG > > instReqsProcessed > > .name(name() + ".instReqsProcessed") > > .desc("Number of Instructions Requests that completed in " > > "this resource.") > > .prereq(instReqsProcessed); > > +#endif > > } > > > > int > > @@ -474,8 +476,10 @@ > > > > // change slot # to -1, since we check slotNum to see if request is > still valid > > slotNum = -1; > > - > > + > > +#ifdef DEBUG > > res->instReqsProcessed++; > > +#endif > > } > > > > ResourceEvent::ResourceEvent() > > diff -r e3311623d9f0 -r 128cce9f92bc src/cpu/inorder/resource.hh > > --- a/src/cpu/inorder/resource.hh Wed Jun 23 18:15:23 2010 -0400 > > +++ b/src/cpu/inorder/resource.hh Wed Jun 23 18:18:20 2010 -0400 > > @@ -253,8 +253,10 @@ > > // DEFAULT RESOURCE STATISTICS > > // > > ///////////////////////////////////////////////////////////////// > > +#ifdef DEBUG > > /** Number of Instruction Requests the Resource Processes */ > > Stats::Scalar instReqsProcessed; > > +#endif > > }; > > > > class ResourceEvent : public Event > _______________________________________________ > m5-dev mailing list > [email protected] > http://m5sim.org/mailman/listinfo/m5-dev > -- - Korey
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