Hi,
I am currently experimenting with the timing CPU in X86_FS, and I have
encountered an assertion failure while booting Linux (using Linux boot as a
test):
m5.debug: build/X86_FS/cpu/simple/timing.cc:900: void
TimingSimpleCPU::completeDataAccess(Packet*): Assertion `_status ==
DcacheWaitResponse || _status == DTBWaitResponse' failed.
I have attached a stack trace (note that completeDataAccess is called
twice in the trace). The current macro-instruction is a POP_M, and the
current uop is the Cda.
In timing mode since the Cda doesn't access memory (the Request::NO_ACCESS
flag is set by Cda), it doesn't wait on a memory access or TLB, so the
status of the CPU before the assertion is _status = Running. I've tried
adding "|| _status == Running" to the conditional in the assertion, and the
simulation gets past that point, but crashes later. I'm not sure if this is
a sound fix, or if there is a better way to handle this.
While browsing the code, I noticed that further up in the call stack,
TimingSimpleCPU::write is called, and when executing this same test using
the atomic CPU, AtomicSimpleCPU::write is called. In the
AtomicSimpleCPU::write code, there is a special case test for
when the Request::NO_ACCESS flag is set. I wonder if the same should occur
in TimingSimpleCPU::write?
Thanks,
Joel
--
Joel Hestness
PhD Student, Computer Architecture
Dept. of Computer Science, University of Texas - Austin
http://www.cs.utexas.edu/~hestness
Starting program: /home/jhestnes/work/m5/build/X86_FS/m5.debug --outdir=$OUTDIR
./configs/example/fs.py --timing
[Thread debugging using libthread_db enabled]
Program received signal SIGABRT, Aborted.
0x00007ffff65f2a75 in *__GI_raise (sig=<value optimized out>) at
../nptl/sysdeps/unix/sysv/linux/raise.c:64
64 ../nptl/sysdeps/unix/sysv/linux/raise.c: No such file or directory.
in ../nptl/sysdeps/unix/sysv/linux/raise.c
#0 0x00007ffff65f2a75 in *__GI_raise (sig=<value optimized out>) at
../nptl/sysdeps/unix/sysv/linux/raise.c:64
#1 0x00007ffff65f65c0 in *__GI_abort () at abort.c:92
#2 0x00007ffff65eb941 in *__GI___assert_fail (assertion=0xd5ef38 "_status ==
DcacheWaitResponse || _status == DTBWaitResponse",
file=<value optimized out>, line=900, function=0xd5fca0 "void
TimingSimpleCPU::completeDataAccess(Packet*)") at assert.c:81
#3 0x0000000000486796 in TimingSimpleCPU::completeDataAccess (this=0x1d13830,
pkt=0x1d1fa90) at build/X86_FS/cpu/simple/timing.cc:900
#4 0x0000000000483f49 in TimingSimpleCPU::sendData (this=0x1d13830,
req=0x1d1f5b0, data=0x2882b70 "", res=0x0, read=false)
at build/X86_FS/cpu/simple/timing.cc:280
#5 0x0000000000484c57 in TimingSimpleCPU::finishTranslation (this=0x1d13830,
state=0x2878270) at build/X86_FS/cpu/simple/timing.cc:659
#6 0x000000000048caf9 in DataTranslation<TimingSimpleCPU>::finish
(this=0x2882f00, fault=..., req=0x1d1f5b0, tc=0x1d154a0, mode=BaseTLB::Write)
at build/X86_FS/cpu/translation.hh:233
#7 0x000000000063be1d in X86ISA::TLB::translateTiming (this=0x1d10080,
req=0x1d1f5b0, tc=0x1d154a0, translation=0x2882f00, mode=BaseTLB::Write)
at build/X86_FS/arch/x86/tlb.cc:721
#8 0x000000000048badd in TimingSimpleCPU::write<unsigned long>
(this=0x1d13830, data=0, addr=18446744071571259048, flags=524291, res=0x0)
at build/X86_FS/cpu/simple/timing.cc:580
#9 0x0000000000ab143d in X86ISA::LdStOp::write<TimingSimpleCPU, unsigned long>
(this=0x2882cf0, xc=0x1d13830, m...@0x7fffffffc198,
EA=18446744071571259048, flags=524291) at
build/X86_FS/arch/x86/insts/microldstop.hh:141
#10 0x0000000000aa3bfc in X86ISAInst::Cda::initiateAcc (this=0x2882cf0,
xc=0x1d13830, traceData=0x0) at
build/X86_FS/arch/x86/timing_simple_cpu_exec.cc:9199
#11 0x0000000000485e32 in TimingSimpleCPU::completeIfetch (this=0x1d13830,
pkt=0x0) at build/X86_FS/cpu/simple/timing.cc:770
#12 0x00000000004853ac in TimingSimpleCPU::fetch (this=0x1d13830) at
build/X86_FS/cpu/simple/timing.cc:690
#13 0x0000000000485696 in TimingSimpleCPU::advanceInst (this=0x1d13830,
fault=...) at build/X86_FS/cpu/simple/timing.cc:735
#14 0x000000000048699e in TimingSimpleCPU::completeDataAccess (this=0x1d13830,
pkt=0x1d1fa90) at build/X86_FS/cpu/simple/timing.cc:932
#15 0x0000000000487097 in TimingSimpleCPU::DcachePort::recvTiming
(this=0x1d13b10, pkt=0x1d1fa90) at build/X86_FS/cpu/simple/timing.cc:964
#16 0x0000000000487f5e in Port::sendTiming (this=0x1d16760, pkt=0x1d1fa90) at
build/X86_FS/mem/port.hh:186
#17 0x0000000000507f28 in Bus::recvTiming (this=0x1a4ce00, pkt=0x1d1fa90) at
build/X86_FS/mem/bus.cc:243
#18 0x0000000000510777 in Bus::BusPort::recvTiming (this=0x1d11650,
pkt=0x1d1fa90) at build/X86_FS/mem/bus.hh:89
#19 0x0000000000487f5e in Port::sendTiming (this=0x1d16170, pkt=0x1d1fa90) at
build/X86_FS/mem/port.hh:186
#20 0x000000000053f7da in SimpleTimingPort::sendDeferredPacket (this=0x1d16170)
at build/X86_FS/mem/tport.cc:150
#21 0x0000000000540431 in SimpleTimingPort::processSendEvent (this=0x1d16170)
at build/X86_FS/mem/tport.cc:191
#22 0x0000000000541133 in EventWrapper<SimpleTimingPort,
&(SimpleTimingPort::processSendEvent())>::process (this=0x1a4c1c8)
at build/X86_FS/sim/eventq.hh:587
#23 0x00000000004a2dba in EventQueue::serviceOne (this=0x127f2c0) at
build/X86_FS/sim/eventq.cc:203
#24 0x00000000004e93aa in simulate (num_cycles=9223372036854775807) at
build/X86_FS/sim/simulate.cc:73
#25 0x000000000041fb8c in _wrap_simulate__SWIG_0 (args=0x193dd10) at
build/X86_FS/python/swig/event_wrap.cc:4378
#26 0x000000000041fd4a in _wrap_simulate (self=0x0, args=0x193dd10) at
build/X86_FS/python/swig/event_wrap.cc:4428
#27 0x00007ffff73fd313 in PyEval_EvalFrameEx () from
/usr/lib/libpython2.6.so.1.0
#28 0x00007ffff73fed60 in PyEval_EvalCodeEx () from /usr/lib/libpython2.6.so.1.0
#29 0x00007ffff73fd0ab in PyEval_EvalFrameEx () from
/usr/lib/libpython2.6.so.1.0
#30 0x00007ffff73fd928 in PyEval_EvalFrameEx () from
/usr/lib/libpython2.6.so.1.0
#31 0x00007ffff73fed60 in PyEval_EvalCodeEx () from /usr/lib/libpython2.6.so.1.0
#32 0x00007ffff73fee32 in PyEval_EvalCode () from /usr/lib/libpython2.6.so.1.0
#33 0x00007ffff73fe0b9 in PyEval_EvalFrameEx () from
/usr/lib/libpython2.6.so.1.0
#34 0x00007ffff73fed60 in PyEval_EvalCodeEx () from /usr/lib/libpython2.6.so.1.0
#35 0x00007ffff73fd0ab in PyEval_EvalFrameEx () from
/usr/lib/libpython2.6.so.1.0
#36 0x00007ffff73fed60 in PyEval_EvalCodeEx () from /usr/lib/libpython2.6.so.1.0
#37 0x00007ffff73fee32 in PyEval_EvalCode () from /usr/lib/libpython2.6.so.1.0
#38 0x00007ffff741cd1c in PyRun_StringFlags () from /usr/lib/libpython2.6.so.1.0
#39 0x00000000004adfe9 in m5Main (argc=4, argv=0x7fffffffe178) at
build/X86_FS/sim/init.cc:194
#40 0x000000000040954b in main (argc=4, argv=0x7fffffffe178) at
build/X86_FS/sim/main.cc:57
_______________________________________________
m5-dev mailing list
m5-dev@m5sim.org
http://m5sim.org/mailman/listinfo/m5-dev
