> On 2010-10-21 13:35:21, Steve Reinhardt wrote: > > src/mem/protocol/MESI_CMP_directory-L1cache.sm, line 332 > > <http://reviews.m5sim.org/r/277/diff/1/?file=4455#file4455line332> > > > > This DPRINTF is broken (and several others like it)... it needs a trace > > flag as the first arg, and "%str" probably isn't the format string you want > > (basically it's just like printf, so you probably mean "%s"). > > Nilay Vaish wrote: > The DPRINTF statements that appear in .sm files are re-written by the > SLICC compiler. SLICC compiler provides the trace flag. Looking at the format > specifier, the compiler will add a .c_str() after print_str(). But in a > comment above, you mentioned that c_str() is not required. May be we can drop > %str altogether. I need to look in to this. > > Steve Reinhardt wrote: > OK, thanks for the clarification. I missed the SLICC compiler code > before but I found it now. I have two comments on that: > - Unless there's a real need to have a different syntax, it would be nice > to just write the SLICC code as a regular DPRINTF and pass DPRINTF calls > through unmodified. I'd like to better understand why you think it's needed > (if you still think it's needed after making the c_str() change). > - If we do end up needing a DPRINTF replacement with different syntax in > SLICC, let's call it something other than DPRINTF to make it clear that it is > different. >
DPRINTF() calls will have to be modified since we want to add line number of the .sm files where the call appears. I think we can maintain the syntax of DPRINTF() as used in other places. But in order to combine adjacent DPRINTF() statements, we would need change to the way DPRINTF() call is processed. As per my understanding, currently SLICC compiler assumes that only one object / variable would be printed at a time. - Nilay ----------------------------------------------------------- This is an automatically generated e-mail. To reply, visit: http://reviews.m5sim.org/r/277/#review398 ----------------------------------------------------------- On 2010-10-19 17:30:48, Nilay Vaish wrote: > > ----------------------------------------------------------- > This is an automatically generated e-mail. To reply, visit: > http://reviews.m5sim.org/r/277/ > ----------------------------------------------------------- > > (Updated 2010-10-19 17:30:48) > > > Review request for Default and Ruby Reviewers. > > > Summary > ------- > > Ruby currently uses GEMS debug support with the enum character string map to > enable certain debug messages. Meanwhile, M5 has debug print support that > works with scons. Compiling the m5.fast binary, the M5 debug statements are > removed, but the Ruby ones are not unless RUBY_DEBUG is not defined. This > patch moves Ruby to M5's debug print support. > > > Diffs > ----- > > src/cpu/testers/rubytest/CheckTable.cc 956ac83b0a58 > src/mem/SConscript 956ac83b0a58 > src/mem/protocol/MESI_CMP_directory-L1cache.sm 956ac83b0a58 > src/mem/protocol/MESI_CMP_directory-L2cache.sm 956ac83b0a58 > src/mem/protocol/MESI_CMP_directory-dir.sm 956ac83b0a58 > src/mem/protocol/MI_example-cache.sm 956ac83b0a58 > src/mem/protocol/MI_example-dir.sm 956ac83b0a58 > src/mem/protocol/MOESI_CMP_directory-L1cache.sm 956ac83b0a58 > src/mem/protocol/MOESI_CMP_directory-L2cache.sm 956ac83b0a58 > src/mem/protocol/MOESI_CMP_directory-dir.sm 956ac83b0a58 > src/mem/protocol/MOESI_CMP_directory-perfectDir.sm 956ac83b0a58 > src/mem/protocol/MOESI_CMP_token-L1cache.sm 956ac83b0a58 > src/mem/protocol/MOESI_CMP_token-L2cache.sm 956ac83b0a58 > src/mem/protocol/MOESI_CMP_token-dir.sm 956ac83b0a58 > src/mem/protocol/MOESI_hammer-cache.sm 956ac83b0a58 > src/mem/protocol/MOESI_hammer-dir.sm 956ac83b0a58 > src/mem/protocol/RubySlicc_Exports.sm 956ac83b0a58 > src/mem/protocol/RubySlicc_MemControl.sm 956ac83b0a58 > src/mem/protocol/RubySlicc_Types.sm 956ac83b0a58 > src/mem/ruby/SConsopts 956ac83b0a58 > src/mem/ruby/buffers/MessageBuffer.cc 956ac83b0a58 > src/mem/ruby/common/Address.hh 956ac83b0a58 > src/mem/ruby/common/DataBlock.hh 956ac83b0a58 > src/mem/ruby/common/Debug.hh 956ac83b0a58 > src/mem/ruby/common/Debug.cc 956ac83b0a58 > src/mem/ruby/common/NetDest.hh 956ac83b0a58 > src/mem/ruby/common/NetDest.cc 956ac83b0a58 > src/mem/ruby/network/garnet/fixed-pipeline/NetworkInterface_d.cc > 956ac83b0a58 > src/mem/ruby/network/garnet/fixed-pipeline/Switch_d.cc 956ac83b0a58 > src/mem/ruby/network/garnet/flexible-pipeline/NetworkInterface.cc > 956ac83b0a58 > src/mem/ruby/network/garnet/flexible-pipeline/Router.cc 956ac83b0a58 > src/mem/ruby/network/simple/PerfectSwitch.cc 956ac83b0a58 > src/mem/ruby/network/simple/Throttle.cc 956ac83b0a58 > src/mem/ruby/network/simple/Topology.cc 956ac83b0a58 > src/mem/ruby/slicc_interface/Message.hh 956ac83b0a58 > src/mem/ruby/slicc_interface/NetworkMessage.hh 956ac83b0a58 > src/mem/ruby/storebuffer/storebuffer.cc 956ac83b0a58 > src/mem/ruby/system/CacheMemory.cc 956ac83b0a58 > src/mem/ruby/system/DirectoryMemory.cc 956ac83b0a58 > src/mem/ruby/system/SConscript 956ac83b0a58 > src/mem/ruby/system/SparseMemory.cc 956ac83b0a58 > src/mem/ruby/tester/RaceyPseudoThread.cc 956ac83b0a58 > src/mem/slicc/ast/FuncCallExprAST.py 956ac83b0a58 > src/mem/slicc/symbols/StateMachine.py 956ac83b0a58 > src/mem/slicc/symbols/Type.py 956ac83b0a58 > > Diff: http://reviews.m5sim.org/r/277/diff > > > Testing > ------- > > > Thanks, > > Nilay > > _______________________________________________ m5-dev mailing list [email protected] http://m5sim.org/mailman/listinfo/m5-dev
