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Ship it! Please merge it with the other patches. - Brad On 2011-01-16 16:06:43, Nilay Vaish wrote: > > ----------------------------------------------------------- > This is an automatically generated e-mail. To reply, visit: > http://reviews.m5sim.org/r/335/ > ----------------------------------------------------------- > > (Updated 2011-01-16 16:06:43) > > > Review request for Default. > > > Summary > ------- > > Ruby: Updates MI cache coherence protocol > This patch updates the MI cache coherence protocol to conform with the new > interfaces of CacheMemory and TBETable classes, and the changes in SLICC. > > > Diffs > ----- > > src/mem/protocol/MI_example-cache.sm 696063d6ed04 > src/mem/protocol/MI_example-dir.sm 696063d6ed04 > > Diff: http://reviews.m5sim.org/r/335/diff > > > Testing > ------- > > Tested using ruby_random_tester.py with l = 10,000,000 and n = 2. > > > Thanks, > > Nilay > >
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