changeset aafb4a7384d4 in /z/repo/m5
details: http://repo.m5sim.org/m5?cmd=changeset;node=aafb4a7384d4
description:
x86: Add checkpointing capability to arch components
Add checkpointing capability to the x86 interrupt device and the TLBs
diffstat:
src/arch/x86/interrupts.cc | 59 ++++++++++++++++++++++++++++++++++++++++++++++
src/arch/x86/interrupts.hh | 13 +--------
src/arch/x86/pagetable.cc | 18 ++++++++++++++
3 files changed, 79 insertions(+), 11 deletions(-)
diffs (125 lines):
diff -r f9b675da608a -r aafb4a7384d4 src/arch/x86/interrupts.cc
--- a/src/arch/x86/interrupts.cc Sun Feb 06 22:14:17 2011 -0800
+++ b/src/arch/x86/interrupts.cc Sun Feb 06 22:14:17 2011 -0800
@@ -706,6 +706,65 @@
}
}
+void
+X86ISA::Interrupts::serialize(std::ostream &os)
+{
+ SERIALIZE_ARRAY(regs, NUM_APIC_REGS);
+ SERIALIZE_SCALAR(clock);
+ SERIALIZE_SCALAR(pendingSmi);
+ SERIALIZE_SCALAR(smiVector);
+ SERIALIZE_SCALAR(pendingNmi);
+ SERIALIZE_SCALAR(nmiVector);
+ SERIALIZE_SCALAR(pendingExtInt);
+ SERIALIZE_SCALAR(extIntVector);
+ SERIALIZE_SCALAR(pendingInit);
+ SERIALIZE_SCALAR(initVector);
+ SERIALIZE_SCALAR(pendingStartup);
+ SERIALIZE_SCALAR(startupVector);
+ SERIALIZE_SCALAR(startedUp);
+ SERIALIZE_SCALAR(pendingUnmaskableInt);
+ SERIALIZE_SCALAR(pendingIPIs);
+ SERIALIZE_SCALAR(IRRV);
+ SERIALIZE_SCALAR(ISRV);
+ bool apicTimerEventScheduled = apicTimerEvent.scheduled();
+ SERIALIZE_SCALAR(apicTimerEventScheduled);
+ Tick apicTimerEventTick = apicTimerEvent.when();
+ SERIALIZE_SCALAR(apicTimerEventTick);
+}
+
+void
+X86ISA::Interrupts::unserialize(Checkpoint *cp, const std::string §ion)
+{
+ UNSERIALIZE_ARRAY(regs, NUM_APIC_REGS);
+ UNSERIALIZE_SCALAR(clock);
+ UNSERIALIZE_SCALAR(pendingSmi);
+ UNSERIALIZE_SCALAR(smiVector);
+ UNSERIALIZE_SCALAR(pendingNmi);
+ UNSERIALIZE_SCALAR(nmiVector);
+ UNSERIALIZE_SCALAR(pendingExtInt);
+ UNSERIALIZE_SCALAR(extIntVector);
+ UNSERIALIZE_SCALAR(pendingInit);
+ UNSERIALIZE_SCALAR(initVector);
+ UNSERIALIZE_SCALAR(pendingStartup);
+ UNSERIALIZE_SCALAR(startupVector);
+ UNSERIALIZE_SCALAR(startedUp);
+ UNSERIALIZE_SCALAR(pendingUnmaskableInt);
+ UNSERIALIZE_SCALAR(pendingIPIs);
+ UNSERIALIZE_SCALAR(IRRV);
+ UNSERIALIZE_SCALAR(ISRV);
+ bool apicTimerEventScheduled;
+ UNSERIALIZE_SCALAR(apicTimerEventScheduled);
+ if (apicTimerEventScheduled) {
+ Tick apicTimerEventTick;
+ UNSERIALIZE_SCALAR(apicTimerEventTick);
+ if (apicTimerEvent.scheduled()) {
+ reschedule(apicTimerEvent, apicTimerEventTick, true);
+ } else {
+ schedule(apicTimerEvent, apicTimerEventTick);
+ }
+ }
+}
+
X86ISA::Interrupts *
X86LocalApicParams::create()
{
diff -r f9b675da608a -r aafb4a7384d4 src/arch/x86/interrupts.hh
--- a/src/arch/x86/interrupts.hh Sun Feb 06 22:14:17 2011 -0800
+++ b/src/arch/x86/interrupts.hh Sun Feb 06 22:14:17 2011 -0800
@@ -257,17 +257,8 @@
* Serialization.
*/
- void
- serialize(std::ostream &os)
- {
- warn("Interrupts::serialize unimplemented!\n");
- }
-
- void
- unserialize(Checkpoint *cp, const std::string §ion)
- {
- warn("Interrupts::unserialize unimplemented!\n");
- }
+ virtual void serialize(std::ostream &os);
+ virtual void unserialize(Checkpoint *cp, const std::string §ion);
/*
* Old functions needed for compatability but which will be phased out
diff -r f9b675da608a -r aafb4a7384d4 src/arch/x86/pagetable.cc
--- a/src/arch/x86/pagetable.cc Sun Feb 06 22:14:17 2011 -0800
+++ b/src/arch/x86/pagetable.cc Sun Feb 06 22:14:17 2011 -0800
@@ -52,11 +52,29 @@
void
TlbEntry::serialize(std::ostream &os)
{
+ SERIALIZE_SCALAR(paddr);
+ SERIALIZE_SCALAR(vaddr);
+ SERIALIZE_SCALAR(size);
+ SERIALIZE_SCALAR(writable);
+ SERIALIZE_SCALAR(user);
+ SERIALIZE_SCALAR(uncacheable);
+ SERIALIZE_SCALAR(global);
+ SERIALIZE_SCALAR(patBit);
+ SERIALIZE_SCALAR(noExec);
}
void
TlbEntry::unserialize(Checkpoint *cp, const std::string §ion)
{
+ UNSERIALIZE_SCALAR(paddr);
+ UNSERIALIZE_SCALAR(vaddr);
+ UNSERIALIZE_SCALAR(size);
+ UNSERIALIZE_SCALAR(writable);
+ UNSERIALIZE_SCALAR(user);
+ UNSERIALIZE_SCALAR(uncacheable);
+ UNSERIALIZE_SCALAR(global);
+ UNSERIALIZE_SCALAR(patBit);
+ UNSERIALIZE_SCALAR(noExec);
}
}
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