FYI...If my local regression tests are correct. This patch does not fix all the problems with the MESI_CMP_directory protocol. One of the patches I just checked in fixes a subtle bug in the ruby_mem_test. Fixing this bug, exposes more deadlock problems in the MESI_CMP_directory protocol.
To reproduce the regression tester's sequencer deadlock error, set the Randomization flag to false in the file configs/example/ruby_mem_test.py then run the following command: build/ALPHA_SE_MESI_CMP_directory/m5.debug configs/example/ruby_mem_test.py -n 8 Let me know if you have any questions, Brad > -----Original Message----- > From: m5-dev-boun...@m5sim.org [mailto:m5-dev-boun...@m5sim.org] > On Behalf Of Nilay Vaish > Sent: Thursday, January 13, 2011 8:50 PM > To: m5-dev@m5sim.org > Subject: [m5-dev] changeset in m5: Ruby: Fixes MESI CMP directory protocol > > changeset 8f37a23e02d7 in /z/repo/m5 > details: http://repo.m5sim.org/m5?cmd=changeset;node=8f37a23e02d7 > description: > Ruby: Fixes MESI CMP directory protocol > The current implementation of MESI CMP directory protocol is > broken. > This patch, from Arkaprava Basu, fixes the protocol. > > diffstat: > > src/mem/protocol/MESI_CMP_directory-L1cache.sm | 25 > +++++++++++++++++++------ src/mem/protocol/MESI_CMP_directory- > L2cache.sm | 25 ++++++++++++++++--------- > 2 files changed, 35 insertions(+), 15 deletions(-) > > diffs (123 lines): > > diff -r 7107a2f3e53a -r 8f37a23e02d7 > src/mem/protocol/MESI_CMP_directory-L1cache.sm > --- a/src/mem/protocol/MESI_CMP_directory-L1cache.sm Thu Jan 13 > 12:30:18 2011 -0800 > +++ b/src/mem/protocol/MESI_CMP_directory-L1cache.sm Thu Jan 13 > 22:17:11 2011 -0600 > @@ -70,6 +70,7 @@ > > M_I, desc="L1 replacing, waiting for ACK"; > E_I, desc="L1 replacing, waiting for ACK"; > + SINK_WB_ACK, desc="This is to sink WB_Acks from L2"; > > } > > @@ -749,9 +750,8 @@ > l_popRequestQueue; > } > > - transition(M_I, Inv, I) { > + transition(M_I, Inv, SINK_WB_ACK) { > ft_sendDataToL2_fromTBE; > - s_deallocateTBE; > l_popRequestQueue; > } > > @@ -766,16 +766,14 @@ > l_popRequestQueue; > } > > - transition(M_I, Fwd_GETX, I) { > + transition(M_I, Fwd_GETX, SINK_WB_ACK) { > dt_sendDataToRequestor_fromTBE; > - s_deallocateTBE; > l_popRequestQueue; > } > > - transition(M_I, {Fwd_GETS, Fwd_GET_INSTR}, I) { > + transition(M_I, {Fwd_GETS, Fwd_GET_INSTR}, SINK_WB_ACK) { > dt_sendDataToRequestor_fromTBE; > d2t_sendDataToL2_fromTBE; > - s_deallocateTBE; > l_popRequestQueue; > } > > @@ -865,6 +863,21 @@ > s_deallocateTBE; > o_popIncomingResponseQueue; > } > + > + transition(SINK_WB_ACK, {Load, Store, Ifetch, L1_Replacement}){ > + z_recycleMandatoryQueue; > + > + } > + > + transition(SINK_WB_ACK, Inv){ > + fi_sendInvAck; > + l_popRequestQueue; > + } > + > + transition(SINK_WB_ACK, WB_Ack){ > + s_deallocateTBE; > + o_popIncomingResponseQueue; > + } > } > > > diff -r 7107a2f3e53a -r 8f37a23e02d7 > src/mem/protocol/MESI_CMP_directory-L2cache.sm > --- a/src/mem/protocol/MESI_CMP_directory-L2cache.sm Thu Jan 13 > 12:30:18 2011 -0800 > +++ b/src/mem/protocol/MESI_CMP_directory-L2cache.sm Thu Jan 13 > 22:17:11 2011 -0600 > @@ -734,11 +734,13 @@ > // BASE STATE - I > > // Transitions from I (Idle) > - transition({NP, IS, ISS, IM, SS, M, M_I, MT_I, MCT_I, I_I, S_I, SS_MB, > M_MB, MT_IIB, MT_IB, MT_SB}, L1_PUTX) { > + transition({NP, IS, ISS, IM, SS, M, M_I, I_I, S_I, M_MB, MT_IB, MT_SB}, > L1_PUTX) { > + t_sendWBAck; > jj_popL1RequestQueue; > } > > - transition({NP, SS, M, MT, M_I, MT_I, MCT_I, I_I, S_I, IS, ISS, IM, SS_MB, > M_MB, MT_IIB, MT_IB, MT_SB}, L1_PUTX_old) { > + transition({NP, SS, M, MT, M_I, I_I, S_I, IS, ISS, IM, M_MB, MT_IB, > MT_SB}, L1_PUTX_old) { > + t_sendWBAck; > jj_popL1RequestQueue; > } > > @@ -968,6 +970,10 @@ > mmu_markExclusiveFromUnblock; > k_popUnblockQueue; > } > + > + transition(MT_IIB, {L1_PUTX, L1_PUTX_old}){ > + zz_recycleL1RequestQueue; > + } > > transition(MT_IIB, Unblock, MT_IB) { > nnu_addSharerFromUnblock; > @@ -1015,21 +1021,22 @@ > o_popIncomingResponseQueue; > } > > + transition(MCT_I, {L1_PUTX, L1_PUTX_old}){ > + zz_recycleL1RequestQueue; > + } > + > // L1 never changed Dirty data > transition(MT_I, Ack_all, M_I) { > ct_exclusiveReplacementFromTBE; > o_popIncomingResponseQueue; > } > > - > - // drop this because L1 will send data again > - // the reason we don't accept is that the request virtual network may be > completely backed up > - // transition(MT_I, L1_PUTX) { > - // jj_popL1RequestQueue; > - //} > + transition(MT_I, {L1_PUTX, L1_PUTX_old}){ > + zz_recycleL1RequestQueue; > + } > > // possible race between unblock and immediate replacement > - transition(MT_MB, {L1_PUTX, L1_PUTX_old}) { > + transition({MT_MB,SS_MB}, {L1_PUTX, L1_PUTX_old}) { > zz_recycleL1RequestQueue; > } > > _______________________________________________ > m5-dev mailing list > m5-dev@m5sim.org > http://m5sim.org/mailman/listinfo/m5-dev _______________________________________________ m5-dev mailing list m5-dev@m5sim.org http://m5sim.org/mailman/listinfo/m5-dev
