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Review request for Default, Ali Saidi, Gabe Black, Steve Reinhardt, and Nathan Binkert. Summary ------- sparc: compilation fixes for inorder Add a few constants and functions that the InOrder model wants for SPARC. * * * sparc: add eaComp function InOrder separates the address generation from the actual access so give Sparc that functionality * * * sparc: add control flags for branches branch predictors and other cpu model functions need to know specific information about branches, so add the necessary flags here (this is really 3 patches in one, for some reason, reviewboard isnt letting me post the patches consecutively) Diffs ----- src/arch/sparc/isa/decoder.isa b4b6ada66ffe src/arch/sparc/isa/formats/branch.isa b4b6ada66ffe src/arch/sparc/isa/formats/mem/basicmem.isa b4b6ada66ffe src/arch/sparc/isa/formats/mem/swap.isa b4b6ada66ffe src/arch/sparc/isa/formats/mem/util.isa b4b6ada66ffe src/arch/sparc/mt.hh PRE-CREATION src/arch/sparc/registers.hh b4b6ada66ffe src/cpu/inorder/cpu.cc b4b6ada66ffe src/cpu/inorder/inorder_dyn_inst.cc b4b6ada66ffe Diff: http://reviews.m5sim.org/r/583/diff Testing ------- Thanks, Korey _______________________________________________ m5-dev mailing list [email protected] http://m5sim.org/mailman/listinfo/m5-dev
