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Hi Nilay,

Comments below.  I might be missing something, but the changes to 
DirectoryMemory seem straightforward.



src/mem/ruby/system/DirectoryMemory.cc
<http://reviews.m5sim.org/r/611/#comment1445>

    In the constructor for AbstractMemory, it appears that the DirectoryMemory 
is being added to the list of abstract memories, correct?  What more do you 
need to do?



src/mem/ruby/system/DirectoryMemory.cc
<http://reviews.m5sim.org/r/611/#comment1447>

    Directory_Entry inherits from Abstract_Entry and Abstract_Entry now 
includes m_Permission.  It seems like you can implement this function very 
similar to what you did with CacheMemory.  Am I missing something?



src/mem/ruby/system/RubyPort.cc
<http://reviews.m5sim.org/r/611/#comment1444>

    You may want to add a ruby_system pointer directly to the RubyPort::M5Port 
to avoid at least one layer of deferencing.


- Brad


On 2011-03-31 20:44:17, Nilay Vaish wrote:
> 
> -----------------------------------------------------------
> This is an automatically generated e-mail. To reply, visit:
> http://reviews.m5sim.org/r/611/
> -----------------------------------------------------------
> 
> (Updated 2011-03-31 20:44:17)
> 
> 
> Review request for Default.
> 
> 
> Summary
> -------
> 
> Ruby: Add support for functional accesses
> This patch is meant for aiding discussions on implementation of functional
> access support in Ruby.
> 
> 
> Diffs
> -----
> 
>   configs/ruby/MESI_CMP_directory.py c7302d55d644 
>   configs/ruby/Ruby.py c7302d55d644 
>   src/mem/ruby/network/Network.cc c7302d55d644 
>   src/mem/ruby/network/Network.py c7302d55d644 
>   src/mem/ruby/profiler/Profiler.cc c7302d55d644 
>   src/mem/ruby/profiler/Profiler.py c7302d55d644 
>   src/mem/ruby/recorder/Tracer.cc c7302d55d644 
>   src/mem/ruby/recorder/Tracer.py c7302d55d644 
>   src/mem/ruby/system/AbstractMemory.hh PRE-CREATION 
>   src/mem/ruby/system/AbstractMemory.cc PRE-CREATION 
>   src/mem/ruby/system/Cache.py c7302d55d644 
>   src/mem/ruby/system/CacheMemory.hh c7302d55d644 
>   src/mem/ruby/system/CacheMemory.cc c7302d55d644 
>   src/mem/ruby/system/DirectoryMemory.hh c7302d55d644 
>   src/mem/ruby/system/DirectoryMemory.cc c7302d55d644 
>   src/mem/ruby/system/DirectoryMemory.py c7302d55d644 
>   src/mem/ruby/system/RubyPort.hh c7302d55d644 
>   src/mem/ruby/system/RubyPort.cc c7302d55d644 
>   src/mem/ruby/system/RubySystem.py c7302d55d644 
>   src/mem/ruby/system/SConscript c7302d55d644 
>   src/mem/ruby/system/Sequencer.cc c7302d55d644 
>   src/mem/ruby/system/Sequencer.py c7302d55d644 
>   src/mem/ruby/system/System.hh c7302d55d644 
>   src/mem/ruby/system/System.cc c7302d55d644 
> 
> Diff: http://reviews.m5sim.org/r/611/diff
> 
> 
> Testing
> -------
> 
> 
> Thanks,
> 
> Nilay
> 
>

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