>I am wondering if what you're seeing is multiple clock ticks >at the same pc, not multiple executions of the same instruction ...
actually they happen at the same tick 1254046000: system.switch_cpus.decode: [tid:0]: Processing instruction [sn:1] with PC (0x405bdd=>0x405be1).(0=>1) 1254046000: system.switch_cpus.decode: [tid:0]: Processing instruction [sn:2] with PC (0x405bdd=>0x405be1).(1=>2) 1254046000: system.switch_cpus.decode: [tid:0]: Processing instruction [sn:3] with PC (0x405bdd=>0x405be1).(2=>3) 1254046000: system.switch_cpus.decode: [tid:0]: Processing instruction [sn:4] with PC (0x405bdd=>0x405be1).(3=>4) 1254046000: system.switch_cpus.decode: [tid:0]: Processing instruction [sn:5] with PC (0x405be1=>0x405be4).(0=>1) 1254046000: system.switch_cpus.decode: [tid:0]: Processing instruction [sn:6] with PC (0x405be4=>0x405bea).(0=>1) 1254046000: system.switch_cpus.decode: [tid:0]: Processing instruction [sn:7] with PC (0x405be4=>0x405bea).(1=>2) 1254046000: system.switch_cpus.decode: [tid:0]: Processing instruction [sn:8] with PC (0x405be4=>0x405bea).(2=>3) >It's the PC advancing and the micro-pc advancing (for micro-coded instructions Sorry which one? can you explain more? -- -- // Naderan *Mahmood; _______________________________________________ gem5-users mailing list [email protected] http://m5sim.org/cgi-bin/mailman/listinfo/gem5-users
