ok thanks. Looking through the instruction at , I see
1254045000: system.switch_cpus.fetch: [tid:0]: Instruction PC 0x405bdd (0) created [sn:1]. 1254045000: system.switch_cpus.fetch: [tid:0]: Instruction is: SUB_M_I : limm t2d, 0x1 ... 1254045000: system.switch_cpus.fetch: [tid:0]: Instruction PC 0x405bdd (1) created [sn:2]. 1254045000: system.switch_cpus.fetch: [tid:0]: Instruction is: SUB_M_I : ldst t1d, DS:[rax + 0x8] ... 1254045000: system.switch_cpus.fetch: [tid:0]: Instruction PC 0x405bdd (2) created [sn:3]. 1254045000: system.switch_cpus.fetch: [tid:0]: Instruction is: SUB_M_I : sub t1d, t1d, t2d .... 1254045000: system.switch_cpus.fetch: [tid:0]: Instruction PC 0x405bdd (3) created [sn:4]. 1254045000: system.switch_cpus.fetch: [tid:0]: Instruction is: SUB_M_I : st t1d, DS:[rax + 0x8] -- -- // Naderan *Mahmood; _______________________________________________ gem5-users mailing list [email protected] http://m5sim.org/cgi-bin/mailman/listinfo/gem5-users
