Sorry for late response. I'm running the in-order model.
Thanks, Yuval Date: Sun, 13 May 2012 03:31:47 -0400 From: Korey Sewell <[email protected]> To: gem5 users mailing list <[email protected]> Subject: Re: [gem5-users] Switch on cache miss in SE mode Message-ID: <CABVets7VC5m6KC2MatgSqMNh=d_q7ve523cvx0wt_fm71j_...@mail.gmail.com> Content-Type: text/plain; charset="iso-8859-1" what CPU model are you running? On Sat, May 12, 2012 at 9:19 AM, Yuval H. Nacson <[email protected] > wrote: > Hello,**** > > ** ** > > I'm new to gem5.**** > > I'm trying to run 2 threads in ALPHA SE mode. The simulation runs for a > very short while and I get the following message:**** > > Exiting @ tick 9223372036854775807 because simulate() limit reached.**** > > Turning on the debug flags I see that on the first data cache miss the > simulator suspends the active thread and activates the next ready thread. > When both of my threads are suspended the CPU "goes to sleep" and never > awaken again.**** > > I dug into the code a bit and my guess is that the cache never signals a > suspended thread that he completed the memory access and the suspended > thread never checks it.**** > > ** ** > > Is there any solution for this problem? Or any suggestion for how should I > fix it?**** > > ** ** > > Thanks,**** > > Yuval.**** > > _______________________________________________ > gem5-users mailing list > [email protected] > http://m5sim.org/cgi-bin/mailman/listinfo/gem5-users > -- - Korey _______________________________________________ gem5-users mailing list [email protected] http://m5sim.org/cgi-bin/mailman/listinfo/gem5-users
