Unfortunately, that hasn't been tested in awhile and isnt in the regression tree. I'd guess one of the recent changes might have provided a bug for the switch-on-cache miss functionality.
What you need to do is run gem5 w/trace flags on "InOrderCPUAll,Exec" and figure out what's the last instruction that is executed for each thread as well as what instruction is waiting for memory to come back. Maybe you can turn on just the trace for memory in InOrder (InOrderCacheUnit?) or even the cache trace (Cache?) and then what you'll see is one instruction going out and not being acknowledged when it comes back. It could be as simple as waking up the CPU with the activity counter on the cache miss. If you start digging into these traces and debugging, we can help you debug this a bit. It's just a matter of identifying which instruction did the CPU go to sleep on and that will lead you to the surrounding cause of it not waking up properly. On Tue, May 15, 2012 at 12:28 PM, Yuval H. Nacson < [email protected]> wrote: > Sorry for late response. > > I'm running the in-order model. > > Thanks, > Yuval > > Date: Sun, 13 May 2012 03:31:47 -0400 > From: Korey Sewell <[email protected]> > To: gem5 users mailing list <[email protected]> > Subject: Re: [gem5-users] Switch on cache miss in SE mode > Message-ID: > <CABVets7VC5m6KC2MatgSqMNh=d_q7ve523cvx0wt_fm71j_...@mail.gmail.com > > > Content-Type: text/plain; charset="iso-8859-1" > > what CPU model are you running? > > On Sat, May 12, 2012 at 9:19 AM, Yuval H. Nacson < > [email protected] > > wrote: > > > Hello,**** > > > > ** ** > > > > I'm new to gem5.**** > > > > I'm trying to run 2 threads in ALPHA SE mode. The simulation runs for a > > very short while and I get the following message:**** > > > > Exiting @ tick 9223372036854775807 because simulate() limit reached.**** > > > > Turning on the debug flags I see that on the first data cache miss the > > simulator suspends the active thread and activates the next ready thread. > > When both of my threads are suspended the CPU "goes to sleep" and never > > awaken again.**** > > > > I dug into the code a bit and my guess is that the cache never signals a > > suspended thread that he completed the memory access and the suspended > > thread never checks it.**** > > > > ** ** > > > > Is there any solution for this problem? Or any suggestion for how should > I > > fix it?**** > > > > ** ** > > > > Thanks,**** > > > > Yuval.**** > > > > _______________________________________________ > > gem5-users mailing list > > [email protected] > > http://m5sim.org/cgi-bin/mailman/listinfo/gem5-users > > > > > > -- > - Korey > > _______________________________________________ > gem5-users mailing list > [email protected] > http://m5sim.org/cgi-bin/mailman/listinfo/gem5-users > -- - Korey
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