Hi Ali, Thanks for the clarification. I think I can go on from here.
Best, Samuel On Mon, Jun 4, 2012 at 10:06 PM, Ali Saidi <[email protected]> wrote: > ** > > Hi Samuel, > > It sounds like you're trying to use our bootloader with the barrelfish OS. > If you look at the code in system/arm/simple_bootloader you can see what > it's doing. This in reasonably linux oriented (wait until you get an > interrupt and read a flag address). The address in question comes from the > configuration. You can see the code that is doing the loading in > src/arch/arm/system.cc and the parameter is defaulted in > src/arch/arm/ArmSystem.py. Our scripts set it in > FSConfig.py self.flags_addr = self.realview.realview_io.pio_addr + 0x30 > which is a scratch register used for this purpose on the system controller. > > > > Thanks, > > Ali > > > > On 04.06.2012 15:26, Samuel Hitz wrote: > > Hi there, > I have a question regarding the starting of a secondary CPU on ARM/Gem5. I > can see that all CPUs except CPU0 are waiting for an interrupt to continue. > Now after they get that interrupt, they execute 'ldr r8, [r5]' which is > supposed to load the boot entry point for this cpu in r8. > Now may question is, how can I set the value of r5 in the secondary CPU? I > need to be able to control what gets loaded, either by knowing what r5 > contains or by setting r5 to an appropriate value. > How can I achieve this? > cheers, > Samuel > > > > > _______________________________________________ > gem5-users mailing list > [email protected] > http://m5sim.org/cgi-bin/mailman/listinfo/gem5-users >
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