Hi Alrhman, Look into the protocol state machine, say L1cache state machine. More specifically you can modify the mandatory_queue_in code for your requirement. The sequencer puts the CPU request into mandatory queue.
Revert incase of any query. Regards, Vipin On Mon, 13 Jul, 2020, 01:18 ABD ALRHMAN ABO ALKHEEL via gem5-users, < gem5-users@gem5.org> wrote: > Hi All, I am currently working on Gem5 with CPU O3 and I want to collect > each instruction and it’s memory address , I can do that by using - > -debug-file=Exec. But I want to know where can I find those address and > print them on txt file. Which file does do that in Gem5? Any help would be > appreciated. Thanks > _______________________________________________ > gem5-users mailing list -- gem5-users@gem5.org > To unsubscribe send an email to gem5-users-le...@gem5.org > %(web_page_url)slistinfo%(cgiext)s/%(_internal_name)s
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