On 3/9/2023 6:45 PM, Mirco Mannino via gem5-users wrote:
Hi all,
I'm trying to take checkpoints from SimPoints for SPEC CPU 2017 in SE mode. I would like to generate
checkpoints for different ISAs (RISCV and X86).
So far, I did the following:
1) BBV files created using "qpoints" tool (https://github.com/pranith/qpoints), since
"--simpoint-profile", from se.py, was taking too long.
2) For the SimPoints, I used the tool from UCSD
(https://cseweb.ucsd.edu/~calder/simpoint/).
3) For the checkpoint generation I used the "--take-simpoint-checkpoint" option
from se.py.
With RISCV I had no problem to take checkpoints for all the benchmarks of IntRate suite (apart from
502.gcc_r).
On the other hand, using X86 I am not able to run several benchmarks of IntRate suite. In
particular, the benchmarks that give me problems are:
* 500.perlbench_r
* 502.gcc_r
* 520.omnetpp_r
* 523.xalancbmk_r
* 557.xz_r
I noticed that all the benchmarks that fail with X86 display the following
warning several times:
"build/X86/arch/x86/generated/exec-ns.cc.inc:27: warn: instruction
'palignr_Vdq_Wdq_Ib' unimplemented"
Any hints on how to solve this? Is there a solution other than implementing the
"palignr" instruction
I am using the last stable version of gem5 (v22.1, commit 5fa484e)
What comes to my mind is compiling while telling gcc to use an x86 model
that does not have the "offending" instruction.
Best - Eliot Moss
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