Are you using PhysicalMemory or DRAMMemory under timing mode?
From: sheng qiu
Sent: Friday, June 25, 2010 3:41 PM
To: [email protected]
Subject: [m5-users] memory access time
Hi all,
i modified the memory access latency calculation in physical.cc: if
pkt->isWrite(), then latency = 6*lat, so write request is more expensive than
read. And i run full system simulation with timing mode. But the results show
no difference with the original unmodified result on 'sim_ticks' under the same
benchmark. I expect that the changed version should take longer of 'sim_ticks',
since the write request's latency is 6 times more than original. Do i miss
something?
Thanks,
Sheng
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