On Sat, Sep 25, 2010 at 3:05 AM,  <[email protected]> wrote:
> Hi, I am using M5 to study cache replacement policy. And I want M5 to skip
> first 40 billion instructions and then running in the detailed mode.
>
> As my may configure different L2 cache for each simulation (e.g. different
> associativity and different replacement policy). Is it possible to make a
> checkpoint suitable for all?

Yes, cache state currently doesn't get checkpointed, so there's no
need for different checkpoints if all you change is the cache
hierarchy.

>
> for example:
> Can I first simulate a system with atomic CPU and no caches for 40 billion
> instructions and then switch to detailed CPU with cache system?

Yes, that's pretty much how we generally do it; you can run for 40B
insts using AtomicSimpleCPU with no caches, then restart from that
checkpoint using various different cache configurations.

Steve

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