On Thu, Oct 7, 2010 at 2:01 AM, Glenn Ko <[email protected]> wrote: > 1. Is it because it's a 64bits and 4 bytes cannot be accessed? > 2. icache is working with 4 bytes because 32bit instructions are processed?
Yup, that's the issue. With x86 support we now support cache-line-crossing accesses, but that's only in the simple CPU models for now... so it might work in the most recent code if you leave the "-d" off your command line. Steve _______________________________________________ m5-users mailing list [email protected] http://m5sim.org/cgi-bin/mailman/listinfo/m5-users
