Good question... I don't know the answer off the top of my head, but you should be able to do it without adding more .cc and .hh files, but just by adding stages to the time buffer so that it takes the buffered values additional cycles to get from one stage to the next.
At least that's the theory of how it's supposed to work... Steve On Mon, Oct 11, 2010 at 1:59 AM, Glenn Ko <[email protected]> wrote: > Hello All, > > > I'm currently trying to modify O3CPU to have deeper pipeline stages. > The extra stages will be dummy stages that only affects the CPI. > What would be the easiest way to do so? > > I tried inserting one dummy stage between fetch and decode stages. > Currently, I have added {dummy1.cc, dummy1.hh, dummy1_impl.hh} that are > made from decode* files. > I also had to modify, {cpu.hh, cpu_policy.hh, cpu.cc, decode.hh, > decode_impl.hh, comm.hh, O3CPU.py, fetch.hh, fetch_impl.hh} files to apply > changes in the pipeline. > > I have the SPARC_SE compiled without branch predictions stuff (from decode > stage) removed from the dummy stage and I receive an error during > fetch_impl.hh checkSignalsAndUpdate. > > void DefaultDummy1<Impl>::readStallSignals(ThreadID) [with Impl = > O3CPUImpl]: Assertion `stalls[tid].dummy1' failed > > I tried removing the dummy1's stall check and now it gives me, > > void DefaultDummy1<Impl>::readStallSignals(ThreadID) [with Impl = > O3CPUImpl]: Assertion `stalls[tid].rename' failed > > Meaning that the decode stage stall check is passed. I decided to step back > and figure out what I need to really do instead of just trying out different > things. > > 1. Is this the easiest way to add dummy stages that doesn't do anything? > 2. What are the things I need to have and shouldn't have in my dummy > stage? > > I would think that branch prediction stuff can go but stall checking could > remain. I actually left the decode branch stuff in there because I was getting > errors compiling them on my initial effort to remove them. > > > -Glenn > _______________________________________________ > m5-users mailing list > [email protected] > http://m5sim.org/cgi-bin/mailman/listinfo/m5-users > _______________________________________________ m5-users mailing list [email protected] http://m5sim.org/cgi-bin/mailman/listinfo/m5-users
