>Good question... I don't know the answer off the top of my head, but
>you should be able to do it without adding more .cc and .hh files, but
>just by adding stages to the time buffer so that it takes the buffered
>values additional cycles to get from one stage to the next.
>
>At least that's the theory of how it's supposed to work...
>
>Steve
What do you mean by adding stages to the time buffer?
Do you mean increasing the delay value for the time buffer between two
stages?
I have several questions regarding these values in O3CPU.py.
1. What is the difference between {stage}To{nextstage}Delay (e.g.
fetchToDecodeDelay) variables and {back/forward}ComSize variables?
The default value for the fetchToDecodeDelay values are 1.
I thought it is to implement 1 cycle delay between the stages.
In that case, what does the default value 5 of the back/forwardComSize
variables mean?
I see that timeBuffer and *Queues are instantiated with
back/forwardComSize = 5, but not sure what that means.
2. I'm also not entirely sure how to distinguish between the skidbuffer and
time buffers.
3. Also, why is the rename stage's skidbuffer size different from one for the
decode stage?
decode_impl.hh: 58
skidBufferMax = (fetchToDecodeDelay * params->fetchWidth) +
decodeWidth;
rename_imple.hh: 76
skidBufferMax = (2 * (iewToRenameDelay * params->decodeWidth)) +
renameWidth;
Thanks in advance.
-Glenn
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