[m5-users] more than one reuest in one tick

Mon, 07 Feb 2011 19:42:22 -0800 

Hi all,
               in the trace of cache i got something like this, i wonder in
one tick how so many requests possible?
 114660500: system.cpu0.dcache: WriteReq  set: 122 block: 802432   hit
114660500: system.cpu0.dcache: WriteReq  set: 122 block: 802432   hit
114660500: system.cpu0.dcache: WriteReq  set: 122 block: 802432   hit
114660500: system.cpu0.dcache: WriteReq  set: 122 block: 802432   hit




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