Yes.  I did enable SMT (Hyperthreading) scheduler support.  Here is
what I have for Processor Family:

"Pentium-4/Celeron(P4-based)/Pentium-4 M/Xeon)"

Here is what dmesg reports:

CPU0: Intel(R) Pentium(R) 4 CPU 3.40GHz stepping 09
CPU1: Intel(R) Pentium(R) 4 CPU 3.40GHz stepping 09

Are my settings correct?  By the way my cpu also has 512K L2 cache.



On Apr 12, 2005 2:08 PM, Richard Fish <[EMAIL PROTECTED]> wrote:
> Zander Z365 wrote:
> 
> >Thanks to all of you for helping me.  I can successfully emerge X &
> >KDE using an SMP kernel and hard setting the CPU frequency.  However,
> >using an SMP kernel 'cat /proc/cpuinfo' nor 'x86info -mhz' seem to
> >show the new cpu frequency.  I do have two more questions:
> >
> >
> 
> Strange...my P4 3Ghz HT reports this fine in /proc/cpuinfo.  What does
> your dmesg output say about your processor(s)?  You should have
> something similar to:
> 
> Apr 11 08:20:55 carcharias CPU0: Intel(R) Pentium(R) 4 CPU 3.00GHz
> stepping 09
> Apr 11 08:20:55 carcharias CPU1: Intel(R) Pentium(R) 4 CPU 3.00GHz
> stepping 09
> 
> Are you sure you selected the right processor family?
> Also, did you enable the SMT (hyperthreading) scheduler in the kernel?
> 
> >1.  Using a Uni-processor kernel it appears I do not have to decrease
> >my cpu frequency to emerge large products or compiles.  Will I loose a
> >great deal of performance using it since  I really only have one cpu
> >(even though It has HT technology)?
> >
> >
> Well, 99% of the time, it won't make any difference.  But, yes, I can
> notice it on my laptop.  I would say the hit is about 20%.  Of course,
> my CPU only has 512K of L2 cache, compared to your, what was it, 2M?, so
> it might not make as big a difference for you.
> 
> The reason is because HT really only helps when you have cache-misses,
> and data must be fetched from RAM.  This takes several clock cycles to
> complete, during which time nothing else can run in the execution unit
> of the processor.  HT adds another instruction pipeline, so as long as
> at least one of the two pipelines can make progress, the execution unit
> is in use.  So fewer cache misses for you should mean less of an impact.
> 
> >2.  Will 'speedfreq' work with SMP kernels?
> >
> >
> 
> Yes.
> 
> -Richard
> 
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