I found this note in CmmCallConv: -- On X86_64, we always pass 128-bit-wide vectors in registers. On 32-bit X86 -- and for all larger vector sizes on X86_64, LLVM's GHC calling convention -- does not currently pass vectors in registers. The patch to update the GHC -- calling convention to support passing SIMD vectors in registers is small and -- well-contained, so it may make it into LLVM 3.4. The hidden -- -fllvm-pass-vectors-in-regs flag will generate LLVM code that attempts to -- pass vectors in registers, but it must only be used with a version of LLVM -- that has an updated GHC calling convention.
What's the status? Is this patch present in LLVM 3.4? As a side note I'm puzzled by the implementation: passVectorInReg :: Width -> DynFlags -> Bool passVectorInReg W128 dflags = case platformArch (targetPlatform dflags) of ArchX86_64 -> True _ -> gopt Opt_LlvmPassVectorsInRegisters dflags passVectorInReg _ dflags = gopt Opt_LlvmPassVectorsInRegisters dflags It seems that by enabling -fllvm-pass-vectors-in-regs I can change the calling convention for vectors of any length other than 128 bits. Janek Dnia środa, 5 listopada 2014, Jan Stolarek napisał: > DynFlags list some LLVM flags as "hidden": > > ( "llvm-tbaa", Opt_LlvmTBAA, nop), -- hidden flag > ( "llvm-pass-vectors-in-regs", Opt_LlvmPassVectorsInRegisters, > nop), -- hidden flag > > Do I undertsand correctly that "hidden" means "not documented in the User's > Guide"? Is there a good reason for this? I'd like to document them as part > of #9358, especially that -fllvm-tbaa is enabled by default for all > optimisation levels. > > Janek > _______________________________________________ > ghc-devs mailing list > ghc-devs@haskell.org > http://www.haskell.org/mailman/listinfo/ghc-devs _______________________________________________ ghc-devs mailing list ghc-devs@haskell.org http://www.haskell.org/mailman/listinfo/ghc-devs