On Sun, Nov 08, 2009 at 08:54:31PM -0500, Dan Clemmensen wrote: > I thought of that. In the origional code, the instantiation connects > clk2x to a signal named tclock, which in turn is connected to clk_fb > and to nothing else. Just in case, I broke the connection from tclock > to clk_fb, so clk2x is in effect connected to nothing externally. My > "project" is now stripped down to a single VHDL file named mytb.vhd, > plus the copied and stripped version of DCM.vhd, but it still exhibits > the problem. > > This leads back to the original question: how do I debug this? I don't > know ADA or VHDL very well, but I do know the GCC tools and their > internals.
Hi, there are some debug options that may help you (--trace-signals, --disp-time). You can also send me the simplified design and I can investigate. Tristan. _______________________________________________ Ghdl-discuss mailing list Ghdl-discuss@gna.org https://mail.gna.org/listinfo/ghdl-discuss
