Hello René,

Le 2013-01-21 20:08, René Doß a écrit :
I want to control a division operation in a testbench and use in C
written function.
The important that I have signed an unsigned operators. And the
result is sometimes a little different in signed bits and so on.

The Controlfunction is in C and I tried to use the follows package. I
want no use interger variables the cast is not possible because the
operator can be signed or unsigend. ( I have also two div opertors div
and divu, the example is for only one div-operator).

The main question, how can I interconnect std_logic_vector into VHPI?


std_logic_vector is an array of std_logic.

http://ygdes.com/GHDL/ has codes that interface with std_logic_vector and std_logic.

std_logic is an enumeration and gets coded into a byte.
so if you pass a std_logic to C, the input parameter must be char.

std_logic_vector is another thing and GHDL/ADA perform a lot of range checks
with somewhat elaborated structures (like with the string type)
but since you use fixed vector lengths, it gets easier because you don't have
to fetch the vector size.

http://ygdes.com/GHDL/io_port/boutons.c has some short code
(and some useful defines) that converts a 4-bits int into a
collection of 4 std_logic, it's simple to do the reverse.
http://ygdes.com/GHDL/io_port/boutons.vhdl contains the VHDL interface.

For vectors, have a look at
http://ygdes.com/GHDL/ghdl_env/ghdl_env.vhdl
and
http://ygdes.com/GHDL/ghdl_env/ghdl_env.c
I suppose (this remains to be checked) that the std_logic_vector type
follows the structure of the string type, which is defined by

struct int_bounds {
  int left;
  int right;
  char dir;
  unsigned int len;
};

struct ghdl_string {
  char *base;
  struct int_bounds *bounds;
};

You access the array of byte with *base.

If you get anything done, please send me the results :-)
Hopefully, it would be cool to have a slv2int function
coded directly in C to speedup some simulations.

Hope this helps,
yg



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