Hello,
is a ‘bound check failure’ always related to entity/component binding,
alternatively
to a mismatch between a component declaration (e.g. in a package) and an entity
description?
In such a case and in addition to ticket 91, I would suggest to name the
failing declarations.
But I think this still does not explain why I get such a failure in
std_logic_1164_body.v93 …
Regards
Patrick
-----------------------------------
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Fakultät Informatik
Institut für Technische Informatik
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From: Ghdl-discuss [mailto:[email protected]] On Behalf Of Adrien
Prost-Boucle
Sent: Tuesday, August 11, 2015 7:53 AM
To: GHDL discuss list <[email protected]>
Subject: Re: [Ghdl-discuss] Bound check failure in std_logic_1164_body.v93
This extends a bit the recent feature request I made:
https://sourceforge.net/p/ghdl-updates/tickets/91/
More details when bound check failure at elaboration would be very apreciated
:-)
On Mon, 2015-08-10 at 22:07 +0000, Lehmann, Patrick wrote:
Hello,
I implemented a new testbench for a UART receiver. As far as I can tell this
testbench works fine
in ISE Simulator. After some tests, I changed my automated testbench script to
use GHDL, vSim and xSim.
I get this message reported for GHDL (0.33dev):
D:\git\PoC\temp\ghdl [paebbels/io +7 ~2 -0 !]> ..\..\tb\testbench.ps1 --ghdl
PoC.io.uart.rx -v
================================================================================
The PoC Library - Testbench Service Tool
================================================================================
PoC.io.uart.rx
preparing simulation environment...
Commands to be run:
1. Change working directory to temporary directory
2. Parse filelist file.
a) For every file: Add the VHDL file to GHDL's compile cache.
3. Compile and run simulation
----------------------------------------
cd "D:\git\PoC\temp\ghdl"
running analysis for every vhdl file...
command: C:\Tools\GHDL\0.33dev\bin\ghdl.exe -a -P. --syn-binding --std=93
--work=poc D:\git\PoC\tb\common\my_config_ML505.vhdl
command: C:\Tools\GHDL\0.33dev\bin\ghdl.exe -a -P. --syn-binding --std=93
--work=poc D:\git\PoC\tb\common\my_project.vhdl
command: C:\Tools\GHDL\0.33dev\bin\ghdl.exe -a -P. --syn-binding --std=93
--work=poc D:\git\PoC\src\common\utils.vhdl
command: C:\Tools\GHDL\0.33dev\bin\ghdl.exe -a -P. --syn-binding --std=93
--work=poc D:\git\PoC\src\common\strings.vhdl
command: C:\Tools\GHDL\0.33dev\bin\ghdl.exe -a -P. --syn-binding --std=93
--work=poc D:\git\PoC\src\common\vectors.vhdl
command: C:\Tools\GHDL\0.33dev\bin\ghdl.exe -a -P. --syn-binding --std=93
--work=poc D:\git\PoC\src\common\board.vhdl
command: C:\Tools\GHDL\0.33dev\bin\ghdl.exe -a -P. --syn-binding --std=93
--work=poc D:\git\PoC\src\common\config.vhdl
command: C:\Tools\GHDL\0.33dev\bin\ghdl.exe -a -P. --syn-binding --std=93
--work=poc D:\git\PoC\src\common\physical.vhdl
command: C:\Tools\GHDL\0.33dev\bin\ghdl.exe -a -P. --syn-binding --std=93
--work=poc D:\git\PoC\src\common\components.vhdl
command: C:\Tools\GHDL\0.33dev\bin\ghdl.exe -a -P. --syn-binding --std=93
--work=poc D:\git\PoC\tb\common\simulation.v93.vhdl
command: C:\Tools\GHDL\0.33dev\bin\ghdl.exe -a -P. --syn-binding --std=93
--work=poc D:\git\PoC\tb\common\simulation.v93.vhdl
command: C:\Tools\GHDL\0.33dev\bin\ghdl.exe -a -P. --syn-binding --std=93
--work=poc D:\git\PoC\src\io\uart\uart.pkg.vhdl
command: C:\Tools\GHDL\0.33dev\bin\ghdl.exe -a -P. --syn-binding --std=93
--work=poc D:\git\PoC\src\io\uart\uart_bclk.vhdl
command: C:\Tools\GHDL\0.33dev\bin\ghdl.exe -a -P. --syn-binding --std=93
--work=poc D:\git\PoC\src\io\uart\uart_rx.vhdl
command: C:\Tools\GHDL\0.33dev\bin\ghdl.exe -a -P. --syn-binding --std=93
--work=test D:\git\PoC\tb\io\uart\uart_rx_tb.vhdl
running simulation...
command: C:\Tools\GHDL\0.33dev\bin\ghdl.exe -r -P. --std=93 --syn-binding
--work=test uart_rx_tb
ERROR while executing ghdl command: C:\Tools\GHDL\0.33dev\bin\ghdl.exe -r -P.
--std=93 --syn-binding --work=test uart_rx_tb
Return Code: 1
--------------------------------------------------------------------------------
C:\Tools\GHDL\0.33dev\bin\ghdl.exe:error: bound check failure at
std_logic_1164_body.v93:174
C:\Tools\GHDL\0.33dev\bin\ghdl.exe:error: simulation failed
There are no errors at analysis time. When running the simulation a bound check
failed. The red lines are the original output from GHDL.
std_logic_1164.v93 line 174 refers to a return statement in this function:
FUNCTION "not" ( l : std_ulogic ) RETURN UX01 IS
BEGIN
RETURN (not_table(l));
END "not";
Is there any way to trace the cause of the error back into my code?
Simulators by comparison:
- ISE Simulator – no error
- Vivado Simulator – fatal error
- GHDL – Bound check failure
- QuestaSim – no error
It’s strange that QuestaSim / ModelSim has no complains …
Vivado message:
Time: 2545 ns Iteration: 5 Process: /uart_rx_tb/line__117 File:
D:/git/PoC/tb/io/uart/uart_rx_tb.vhdl
FATAL_ERROR: Vivado Simulator kernel has discovered an exceptional condition
from which it cannot recover. Process will terminate. …..
Time: 2545 ns Iteration: 5 Process: /uart_rx_tb/line__117
File: D:/git/PoC/tb/io/uart/uart_rx_tb.vhdl
I think it crashes at one of my assert procedures, so it’s most likely not
related to the GHDL message.
Regards
Patrick
-----------------------------------
Wissenschaftliche Hilfskraft
Technische Universität Dresden
Fakultät Informatik
Institut für Technische Informatik
Lehrstuhl VLSI-Entwurfssysteme, Diagnostik und Architektur
01062 Dresden
Tel.: +49 351 463-38451
Fax: +49 351 463-38324
Raum: APB-1020
E-Mail: [email protected] <mailto:[email protected]>
WWW: <http://vlsi-eda.inf.tu-dresden.de/> http://vlsi-eda.inf.tu-dresden.de
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