Hello Tristan, Tanks fort he workaround. Is it because of the procedure directly called in the architecture instead of a process-hosted call, or is it related to the nested procedure / function call?
This testbench code isn't unusual, is it?
Regards
Patrick
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-----Original Message-----
From: Ghdl-discuss [mailto:[email protected]] On Behalf Of Tristan
Gingold
Sent: Tuesday, September 01, 2015 7:58 AM
To: [email protected]
Subject: Re: [Ghdl-discuss] Bound check failure in std_logic_1164_body.v93
On 30/08/15 03:55, Tristan Gingold wrote:
> On 27/08/15 13:55, [email protected] wrote:
>> Hello,
>>
>> while trying to investigate, I was not able to find
>> tb/common/my_project.vhdl. Is this file automatically generated ?
>
> Ok, I think I understand why this design fails.
As a workaround, in uart_rx_tb.vhdl, you can replace:
simGenerateWaveform(UART_RX,
simGenerateWaveform_UART_Stream(DATA_STREAM, BAUDRATE), '1');
with:
process
constant wf : T_SIM_WAVEFORM_SL :=
simGenerateWaveform_UART_Stream(DATA_STREAM, BAUDRATE);
begin
simGenerateWaveform(UART_RX, wf, '1');
end process;
Regards,
Tristan.
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