David Miller <da...@davemloft.net> writes: So here is a working generic 64-bit sparc lshift.asm that seems to work well on all chips. I'm now going to iterate over lshiftc and rshift. I whacked off some code at the end, and generalised the resulting code to become a lorrshift.asm. Some additional things should be streamlined, see comments in the code.
lorrshift.asm
Description: Binary data
We lose 0.5 c/l on T1 (and presumably on T2 too) compared to the old code. But 17 c/l to 17.5 c/l is no calamity, and it is good to have fewer variants. -- Torbjörn
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