In a message dated 10/9/2006 2:32:29 P.M. Central Standard Time, [EMAIL PROTECTED] writes:
zSeries instructions are really millicoded from simplier instructions (zSeries + "special purpose"). I wonder how difficult it would be for IBM to implement a totally millicoded zSeries instruction set using a Power chip? >> Yeah, but it would one of those almost like zSeries. It may be fairly easy to simulate/emulate but you'd never know was it live or Memorex until you field tested a couple thousand under disparate workloads and configurations. FWIW I knew one of the designers at MASSSTOR and they tried to replace the IBM engine with an OEM at a substantial cost savings. Never flew. Traced it down to one instruction that was supposed to be in a certain range. It was, but on the IBM box it was always, always the low end and worked. On the OEM processor it was mid-range and failed if processor was more than 25% busy. Truly a timing problem. ---------------------------------------------------------------------- For IBM-MAIN subscribe / signoff / archive access instructions, send email to [EMAIL PROTECTED] with the message: GET IBM-MAIN INFO Search the archives at http://bama.ua.edu/archives/ibm-main.html
