The following message is a courtesy copy of an article
that has been posted to alt.folklore.computers,bit.listserv.ibm-man as well.


Anne & Lynn Wheeler <[EMAIL PROTECTED]> writes:
> A.6 Multiprogramming and Multiprocessing Examples
> http://publibz.boulder.ibm.com/cgi-bin/bookmgr_OS390/BOOKS/DZ9ZR003/A.6?SHELF=DZ9ZBK03&DT=20040504121320
>
> from above:
>
> When two or more programs sharing common storage locations are being
> executed concurrently in a multiprogramming or multiprocessing
> environment, one program may, for example, set a flag bit in the
> common-storage area for testing by another program. It should be noted
> that the instructions AND (NI or NC), EXCLUSIVE OR (XI or XC), and OR
> (OI or OC) could be used to set flag bits in a multiprogramming
> environment; but the same instructions may cause program logic errors
> in a multiprocessing configuration where two or more CPUs can fetch,
> modify, and store data in the same storage locations simultaneously.
>
> Subtopics:
>
> * A.6.1 Example of a Program Failure Using OR Immediate
> * A.6.2 Conditional Swapping Instructions (CS, CDS)
> * A.6.3 Bypassing Post and Wait
> * A.6.4 Lock/Unlock
> * A.6.5 Free-Pool Manipulation
> * A.6.6 PERFORM LOCKED OPERATION (PLO) 
>
> ... snip ...

re:
http://www.garlic.com/~lynn/2006s.html#53 Is the teaching of non-reentrant 
HLASM coding practices ever defensible?

... as to having people well versed with "A.6.1" problems ...  there
was a rumor in the late 70s that the hardware engineers were
approached by MVS group to make the immediate instructions atomic on
multiprocessor machines. MVS was moving kernel from the old-style
os/360 single global kernel/supervisor lock to higher degrees of
kernel parallelism and were having a devil of a time converting all
the non-atomic immediate instruction coding for parallel operation.

... having re-entrant programming supporting multiple concurrent
operation ... including supporting multiple concurrent operation in
same address space (aka threading/multitasking) ... for highly
parallel operation.

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