>[snip] Next you should suspect that you attempted to execute a >6-byte-long instruction just before the LA. Subtract 6 from the PSW's >address and you can see the C1, which is a 6-byte instruction. [snip]
Let me add my 2ยข about how to handle PSW NSI and ILC. While not relevant to this case it might help in 0C4 cases. The PSW's instruction address points to the next sequential instruction (NSI) address on 0Cx interrupts, except for 0C4-xxx where xxx indicates a "storage not allocated" type of error (page, segment, region translation error). In the latter case the NSI *is* the address of the failing instruction. Important point to remember when debugging 0C4 abends. There are exceptions, e.g. if the target of an EX fails. Peter Hunkeler CREDIT SUISSE ---------------------------------------------------------------------- For IBM-MAIN subscribe / signoff / archive access instructions, send email to [EMAIL PROTECTED] with the message: GET IBM-MAIN INFO Search the archives at http://bama.ua.edu/archives/ibm-main.html
