The following message is a courtesy copy of an article that has been posted to bit.listserv.ibm-main,alt.folklore.computers as well.
Anne & Lynn Wheeler <[EMAIL PROTECTED]> writes: > long ago and far away, this was one of the battles getting the > compare&swap instruction into 370 architecture. test&set had been around > in the 60s and was used fro 360/65 multiprocessor support with global > kernel spin-locks (set the lock and everybody else spins, untill the > lock is cleared). > ... > somewhat implicit in a lot of compare&swap uses is that there can be > concurrent threads executing in the same instruction sequences > simultaneously. the inital forey into POK attempting to get compare&swap > justified was unsuccesful, in large part because the favorite son > operating system felt that test&set was just fine for multiprocessor > support (the 360/65 smp global spin lock paradigm). the challenge was to > create justification for compare&swap instruction that was applicable to > single processor deployment. Thus was born the programming notes that > can be found in principles of operation describing how the "atomic" > characteristics of comapre&swap can be leveraged in single processor > environment for multithreaded applications (like DBMS) ... these aren't > necessarily concurrent multithreads ... but multiple threads that might > be interrupted and so atomic operations can be applied to both > simultaneous concurrent multithread operation as well as possibly > non-simultaneous (but interrruptable) multithreaded operation. re: http://www.garlic.com/~lynn/2007l.html#24 Is Parallel Programming Just Too Hard? misc. past posts mentioning smp and/or compare&swap instruction http://www.garlic.com/~lynn/subtopic.html#smp in the mid-70s i was working on a 5-way SMP implementation it involved one of the lower-end 370 processor designs ... and was moving lots of features into microcode. for one reason or another that project got killed, misc. past posts discussing the effort http://www.garlic.com/~lynn/subtopic.html#bounce shortly after that got killed, there was another project started for 16-way smp involving higher-end processors. we even co-opted the spare time from some of the processor engineers furiously attempting to complete the 3033. in general, most people that looked at it thought it was a really great idea ... until it came to the attention of the head of POK that it would possible be decades before the POK favorite son operating system would be able to support the machine. At which time, the 3033 engineers were instructed to get their noses back to the grindstone and some people were invited to never show up in POK again. misc. past references: http://www.garlic.com/~lynn/95.html#5 Who started RISC? (was: 64 bit Linux?) http://www.garlic.com/~lynn/95.html#6 801 http://www.garlic.com/~lynn/95.html#11 801 & power/pc http://www.garlic.com/~lynn/98.html#40 Comparison Cluster vs SMP? http://www.garlic.com/~lynn/2000.html#86 Ux's good points. http://www.garlic.com/~lynn/2001e.html#5 SIMTICS http://www.garlic.com/~lynn/2001h.html#33 D http://www.garlic.com/~lynn/2002i.html#82 HONE http://www.garlic.com/~lynn/2003.html#4 vax6k.openecs.org rebirth http://www.garlic.com/~lynn/2003.html#5 vax6k.openecs.org rebirth http://www.garlic.com/~lynn/2004f.html#21 Infiniband - practicalities for small clusters http://www.garlic.com/~lynn/2004f.html#26 command line switches [Re: [REALLY OT!] Overuse of symbolic http://www.garlic.com/~lynn/2004j.html#45 A quote from Crypto-Gram http://www.garlic.com/~lynn/2004m.html#53 4GHz is the glass ceiling? http://www.garlic.com/~lynn/2005k.html#45 Performance and Capacity Planning http://www.garlic.com/~lynn/2005m.html#48 Code density and performance? http://www.garlic.com/~lynn/2005p.html#39 What ever happened to Tandem and NonStop OS ? http://www.garlic.com/~lynn/2006c.html#40 IBM 610 workstation computer http://www.garlic.com/~lynn/2006l.html#30 One or two CPUs - the pros & cons http://www.garlic.com/~lynn/2006n.html#37 History: How did Forth get its stacks? http://www.garlic.com/~lynn/2006r.html#22 Was FORTRAN buggy? http://www.garlic.com/~lynn/2006t.html#7 32 or even 64 registers for x86-64? http://www.garlic.com/~lynn/2006t.html#9 32 or even 64 registers for x86-64? http://www.garlic.com/~lynn/2007g.html#17 The Perfect Computer - 36 bits? http://www.garlic.com/~lynn/2007g.html#44 1960s: IBM mgmt mistrust of SLT for ICs? http://www.garlic.com/~lynn/2007g.html#57 IBM to the PCM market(the sky is falling!!!the sky is falling!!) ---------------------------------------------------------------------- For IBM-MAIN subscribe / signoff / archive access instructions, send email to [EMAIL PROTECTED] with the message: GET IBM-MAIN INFO Search the archives at http://bama.ua.edu/archives/ibm-main.html
