> -----Original Message-----
> From: IBM Mainframe Discussion List [mailto:ibm-m...@bama.ua.edu] On
> Behalf Of Kirk Wolf
> Sent: Wednesday, April 22, 2009 8:44 PM
> To: IBM-MAIN@bama.ua.edu
> Subject: Re: METAL C: CodeGen defeciency?
<Snipped> 
> Interesting that they didn't use XC, isn't it?   If you spend any time
> looking at XLC generated code you will see lots of interesting stuff.
> Of particular interest is some of the loop unwinding optimizations.
> After a while you start to wonder if you should ever write in
> assembler again, since only IBM knows what instruction heuristics
> slide through the pipelines the best.

It seems to me to be counterproductive of IBM to "hide" (or simply fail
to publish) knowledge or advice on effective assembler programming to
take advantage of (or at least not to fall afoul of) the pipeline nature
of today's z processors.

Obviously a thorough reading of the z/Arch PoOP will give an experienced
assembler programmer a few "don't do this, it flushes the pipeline"
cautions, like the following that I recently ran across while
researching something else entirely:

In the notes under the Branch on Condition instruction in Chapter 7:

"4. Execution of BCR 15,0 (that is, an instruction
with a value of 07F0 hex) may result in significant
performance degradation. To ensure optimum
performance, the program should avoid use of
BCR 15,0 except in cases when the serialization
or checkpoint-synchronization function is actually
required."

But let's face it -- how many of us have the time to be "thorough" about
reading the PoOP?

So, does anyone who regularly reads the IBM Systems Journal or
Redbooks/Redpapers or other IBM pubs know of anything that IBM may have
published that consolidates and exposes such knowledge?  I, for one,
would be very happy to reduce my ignorance with a little such light
reading.

Peter


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