To get a PIC-4 in PSW key zero is only possible when either: (I don't believe it is possible to get PIC-4 on fetch with KEY0)
(1) Modifying storage 2048-4095 without playing with the control registers (2) Modifying segment protected storage Which were you doing? Remember, after a PIC-4 the segment translation address is garbage and the PSW is pointing at the next instruction (as opposed to S0C4 due to PIC-10/11 where you have that information) so you need to look at what the previous instruction was doing. On Mon, 11 Aug 2025 14:26:59 -0400 Joseph Reichman <[email protected]> wrote: :>The storage for the SRB was from sp=0 :>Default key=8 :> :>The PSW key at the time was key 0 :> :>This s0C4 pic 4 :> :> :> :> :>On Mon, Aug 11, 2025 at 2:24?PM Binyamin Dissen < :>[email protected]> wrote: :> :>> On Mon, 11 Aug 2025 12:01:05 -0400 Joseph Reichman :>> <[email protected]> wrote: :>> :>> :>Its a S0C4 pic 4 :>> :>> Where, referring to what? :>> :>> :>I had coded in the IEAMSCHED macro key=invokerkey :>> :>> :>My MODESET had key=zero,MODE=SUP :>> :>> MODESET? Where? :>> :>> :>Oh :>> :>> :>My storage for the SRB was from subpool 0 :>> :>> Don't see any way to specify the SRB storage via IEAMSCHD. :>> :>> :>Thanks Binyamin :>> :> :>> :> :>> :> :>> :>> On Aug 10, 2025, at 11:57?PM, Binyamin Dissen < :>> [email protected]> wrote: :>> :>> :>> :>> ?On Sun, 10 Aug 2025 22:03:33 -0400 Joseph Reichman :>> :>> <[email protected]> wrote: :>> :>> :>> :>> :>Peter Relson told about this a Stimer that you can call in srb or :>> cross :>> :>> :>memory I am running in SRB mode the SRB storage is not CSA but in :>> private I :>> :>> :>got the storage for the SRB and parameter list with Storage obtain :>> using an :>> :>> :>ALET :>> :>> :>> :>> :>Am getting s0c4 and am wondering if the CONTROL parameters have to :>> be in CSA :>> :>> :>> :>> The SRB storage is only used by the system between scheduling the SRB :>> and :>> :>> starting it. Once the SRB code starts, the SRB storage is simply :>> memory and is :>> :>> not used by the system. :>> :>> :>> :>> I think that if the SRB is scheduled SCOPE=LOCAL and the primary :>> address space :>> :>> is the target memory that you should be able to storage of the address :>> space. :>> :>> :>> :>> But why use SCHEDULE when IEAMSCHD is available? :>> :>> :>> :>> As always, before asking questions, do simple debugging to determine :>> where the :>> :>> failure was and in the case of 0C4 what caused the failure and what :>> was the :>> :>> PIC. :>> :>> :>> :>> -- :>> :>> Binyamin Dissen <[email protected]> :>> :>> http://www.dissensoftware.com :>> :>> :>> :>> Director, Dissen Software, Bar & Grill - Israel :>> :>> :>> :>> ---------------------------------------------------------------------- :>> :>> For IBM-MAIN subscribe / signoff / archive access instructions, :>> :>> send email to [email protected] with the message: INFO IBM-MAIN :>> :> :>> :>---------------------------------------------------------------------- :>> :>For IBM-MAIN subscribe / signoff / archive access instructions, :>> :>send email to [email protected] with the message: INFO IBM-MAIN :>> :>> -- :>> Binyamin Dissen <[email protected]> :>> http://www.dissensoftware.com :>> :>> Director, Dissen Software, Bar & Grill - Israel :>> :>> ---------------------------------------------------------------------- :>> For IBM-MAIN subscribe / signoff / archive access instructions, :>> send email to [email protected] with the message: INFO IBM-MAIN :>> :> :>---------------------------------------------------------------------- :>For IBM-MAIN subscribe / signoff / archive access instructions, :>send email to [email protected] with the message: INFO IBM-MAIN -- Binyamin Dissen <[email protected]> http://www.dissensoftware.com Director, Dissen Software, Bar & Grill - Israel ---------------------------------------------------------------------- For IBM-MAIN subscribe / signoff / archive access instructions, send email to [email protected] with the message: INFO IBM-MAIN
