IHAECVT will be updated in the next release (after z/OS 3.2) as follows:

ECVTXTSW DC   V(ISGXSRBW)          Address of "Cross-memory TCB or
*                        SRB wait" routine.
*                      - Caller must be AMODE 31, key 0, supervisor
*                        state, enabled for I/O and external
*                        interrupts, holding no locks.
*                      - SRB or task mode.
*                      - Primary ASC mode.
*                      - Any P, Any S, Any H.
*                      - Load this address into GR 15,
*                      - Issue BASR 14,15
*                      - 31-bit GRs 2-13, high halves 2-14, and
*                        ARs 2-14 will be preserved.
*                      - On entry R1 should contain the address of
*                        a standard parameter list. The parameter
*                        list consists of a fullword that is
*                        the address of an 8-byte area that contains
*                        the time to wait, in TOD clock format.
*                      - On entry, R13 must point to a 72-byte save
*                        area.                                     @xxA
*                      - On exit, GR 15 contains the return code:
*                        0  = Wait successfully completed.
*                        16 = Unable to obtain storage to perform the
*                             suspend operation.
*                        20 = SUSPEND w/TOKEN is prohibited for this
*                             SRB. A PURGEDQ might already have been
*                             issued for this SRB.
*                        24 = An unrecoverable error occurred in
*                             SUSPEND processing.
*                      - Potential Abend Codes:
*            AC7 REASON-CODE 00410001: RESUME request did not complete
*                normally
*            AC7 REASON-CODE 00410002: An error occurred during the
*                timer DIE execution and the FRR abended the owning
*                task for the SRB that was to be resumed

Jim Mulder

-----Original Message-----
From: IBM Mainframe Discussion List <[email protected]> On Behalf Of 
Joseph Reichman
Sent: Monday, August 11, 2025 6:15 PM
To: [email protected]
Subject: Re: Question about ECVTXTSW/ V(ISGXSRBW)" Address of "Cross memory TCB 
or SRB WAIT routines

Didn't Have register13 initialized I went to the address 8 SDWAEC1 And it 
pointed to an LR THE INST BEFORE stm 14,12,12(13) in the wait routine nowhere 
in the documentation does it say anything about r13

thank
 you all


900 (384) ADDRESS 4 ECVTXTSW "V(ISGXSRBW)" Address of "Cross memory TCB or SRB 
wait" routine.- Caller must be AMODE 31, key  0, supervisor state, enabled for  
I/O and external interrupts, holding  no locks. - SRB or task mode. 
Primary ASC mode. - Any P, Any S,
 Any H. - Load this address into
 GR 15, - Issue BASR 14,15 - 31
bit GRs 2-13, high halves 2-14, and
 ARs 2-14 will be preserved. - On
 entry R1 should contain the address
 of a standard parameter list. The
 parameter list consists of a fullword
 that is the address of an 8-byte
 area that contains the time to wait,
 in TOD clock format. - On exit,
 GR 15 contains the return code:
 0 = Wait successfully completed.
 16 = Unable to obtain storage to
 perform the suspend operation. 20
 = SUSPEND w/TOKEN is prohibited for
 this SRB. A PURGEDQ might already
 have been issued for this SRB. 24
 = An unrecoverable error occurred in
 SUSPEND processing. - Potential Abend
 Codes 

Joe Reichman
Joe Reichman
Lead Developer Sam Golob Systems Programming LLC
71-28 163 St Apt 1A
Fresh Meadows NY 11365

-----Original Message-----
From: IBM Mainframe Discussion List <[email protected]> On Behalf Of 
Binyamin Dissen
Sent: Monday, August 11, 2025 2:59 PM
To: [email protected]
Subject: Re: Question about ECVTXTSW/ V(ISGXSRBW)" Address of "Cross memory TCB 
or SRB WAIT routines

To get a PIC-4 in PSW key zero is only possible when either: (I don't believe 
it is possible to get PIC-4 on fetch with KEY0)

(1) Modifying storage 2048-4095 without playing with the control registers

(2) Modifying segment protected storage

Which were you doing?

Remember, after a PIC-4 the segment translation address is garbage and the PSW 
is pointing at the next instruction (as opposed to S0C4 due to PIC-10/11 where 
you have that information) so you need to look at what the previous instruction 
was doing.



On Mon, 11 Aug 2025 14:26:59 -0400 Joseph Reichman 
<[email protected]> wrote:

:>The storage for the SRB was from sp=0
:>Default key=8
:>
:>The PSW key at the time was key 0
:>
:>This s0C4 pic 4
:>
:>
:>
:>
:>On Mon, Aug 11, 2025 at 2:24?PM Binyamin Dissen < 
:>[email protected]> wrote:
:>
:>> On Mon, 11 Aug 2025 12:01:05 -0400 Joseph Reichman :>> 
<[email protected]> wrote:
:>>
:>> :>It's a S0C4 pic 4
:>>
:>> Where, referring to what?
:>>
:>> :>I had coded in the IEAMSCHED macro key=invokerkey :>> :>> :>My MODESET 
had key=zero,MODE=SUP :>> :>> MODESET? Where?
:>>
:>> :>Oh...
:>>
:>> :>My storage for the SRB was from subpool 0 :>> :>> Don't see any way to 
specify the SRB storage via IEAMSCHD.
:>>
:>> :>Thanks Binyamin
:>> :>
:>> :>
:>> :>
:>> :>> On Aug 10, 2025, at 11:57?PM, Binyamin Dissen < :>> 
[email protected]> wrote:
:>> :>>
:>> :>> ?On Sun, 10 Aug 2025 22:03:33 -0400 Joseph Reichman :>> :>> 
<[email protected]> wrote:
:>> :>>
:>> :>> :>Peter Relson told about this a Stimer that you can call in srb or :>> 
cross :>> :>> :>memory I am running in SRB mode the SRB storage is not CSA but 
in :>> private I :>> :>> :>got the storage for the SRB and parameter list with 
Storage obtain :>> using an :>> :>> :>ALET :>> :>> :>> :>> :>Am getting s0c4 
and am wondering if the CONTROL parameters have to :>> be in CSA :>> :>> :>> 
:>> The SRB storage is only used by the system between scheduling the SRB :>> 
and :>> :>> starting it. Once the SRB code starts, the SRB storage is simply 
:>> memory and is :>> :>> not used by the system.
:>> :>>
:>> :>> I think that if the SRB is scheduled SCOPE=LOCAL and the primary :>> 
address space :>> :>> is the target memory that you should be able to storage 
of the address :>> space.
:>> :>>
:>> :>> But why use SCHEDULE when IEAMSCHD is available?
:>> :>>
:>> :>> As always, before asking questions, do simple debugging to determine 
:>> where the :>> :>> failure was and in the case of 0C4 what caused the 
failure and what :>> was the :>> :>> PIC.
:>> :>>
:>> :>> --
:>> :>> Binyamin Dissen <[email protected]> :>> :>> 
http://www.dissensoftware.com :>> :>> :>> :>> Director, Dissen Software, Bar & 
Grill - Israel :>> :>> :>> :>>
----------------------------------------------------------------------
:>> :>> For IBM-MAIN subscribe / signoff / archive access instructions, :>> :>> 
send email to [email protected] with the message: INFO IBM-MAIN :>> :> 
:>>
:>----------------------------------------------------------------------
:>> :>For IBM-MAIN subscribe / signoff / archive access instructions, :>> 
:>send email to [email protected] with the message: INFO IBM-MAIN :>> 
:>> -- :>> Binyamin Dissen <[email protected]> :>> 
http://www.dissensoftware.com :>> :>> Director, Dissen Software, Bar & Grill
- Israel :>> :>>
----------------------------------------------------------------------
:>> For IBM-MAIN subscribe / signoff / archive access instructions, :>> send 
email to [email protected] with the message: INFO IBM-MAIN :>> :>
:>----------------------------------------------------------------------
:>For IBM-MAIN subscribe / signoff / archive access instructions, :>send email 
to [email protected] with the message: INFO IBM-MAIN

--
Binyamin Dissen <[email protected]> http://www.dissensoftware.com

Director, Dissen Software, Bar & Grill - Israel

----------------------------------------------------------------------
For IBM-MAIN subscribe / signoff / archive access instructions, send email to 
[email protected] with the message: INFO IBM-MAIN

----------------------------------------------------------------------
For IBM-MAIN subscribe / signoff / archive access instructions, send email to 
[email protected] with the message: INFO IBM-MAIN

----------------------------------------------------------------------
For IBM-MAIN subscribe / signoff / archive access instructions,
send email to [email protected] with the message: INFO IBM-MAIN

Reply via email to