In response to: > Can anyone explain why the following code did not work in AMODE 64 but works > in AMODE 31?
Yes... bit 32 of R15 on entry to your STIMER exit routine is on. In AMODE 64 the LA of the ECB address propagates it into R1. Thus R1 indicates it is a cross-memory POST. In AMODE 31 the LA of the ECB ignores it so the POST works as expected. Greg I turned off bit 32 in R15 and that fixed the problem... Thank you. I am confused about a couple of things however... 1) If in AMODE64 when the STIMERX macro was issued, why was bit 32 on in R15? Seems wrong to me. 2) Why didn't the "LA 1,STIMECB" abend on an S0C4-38 when bit 32 on the base reg was on? Thank you all for your help ---------------------------------------------------------------------- For IBM-MAIN subscribe / signoff / archive access instructions, send email to lists...@listserv.ua.edu with the message: INFO IBM-MAIN
