In preparation for huge gtt pages expose a page_size_mask as part of the device info, to indicate the page sizes supported by the HW. Currently only 4K is supported.
Signed-off-by: Matthew Auld <matthew.a...@intel.com> Cc: Joonas Lahtinen <joonas.lahti...@linux.intel.com> Cc: Mika Kuoppala <mika.kuopp...@linux.intel.com> Cc: Chris Wilson <ch...@chris-wilson.co.uk> Reviewed-by: Joonas Lahtinen <joonas.lahti...@linux.intel.com> --- drivers/gpu/drm/i915/i915_drv.h | 1 + drivers/gpu/drm/i915/i915_gem_gtt.h | 8 +++++++- drivers/gpu/drm/i915/i915_pci.c | 20 ++++++++++++++++++++ drivers/gpu/drm/i915/selftests/mock_gem_device.c | 3 +++ 4 files changed, 31 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h index 655548c14b9b..fe225cb9b622 100644 --- a/drivers/gpu/drm/i915/i915_drv.h +++ b/drivers/gpu/drm/i915/i915_drv.h @@ -843,6 +843,7 @@ struct intel_device_info { enum intel_platform platform; u8 ring_mask; /* Rings supported by the HW */ u8 num_rings; + unsigned int page_size_mask; /* page sizes supported by the HW */ #define DEFINE_FLAG(name) u8 name:1 DEV_INFO_FOR_EACH_FLAG(DEFINE_FLAG); #undef DEFINE_FLAG diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.h b/drivers/gpu/drm/i915/i915_gem_gtt.h index b4e3aa7c0ce1..4c2f7d7c1e7d 100644 --- a/drivers/gpu/drm/i915/i915_gem_gtt.h +++ b/drivers/gpu/drm/i915/i915_gem_gtt.h @@ -42,7 +42,13 @@ #include "i915_gem_request.h" #include "i915_selftest.h" -#define I915_GTT_PAGE_SIZE 4096UL +#define I915_GTT_PAGE_SIZE_4K BIT(12) +#define I915_GTT_PAGE_SIZE_64K BIT(16) +#define I915_GTT_PAGE_SIZE_2M BIT(21) +#define I915_GTT_PAGE_SIZE_1G BIT(30) + +#define I915_GTT_PAGE_SIZE I915_GTT_PAGE_SIZE_4K + #define I915_GTT_MIN_ALIGNMENT I915_GTT_PAGE_SIZE #define I915_FENCE_REG_NONE -1 diff --git a/drivers/gpu/drm/i915/i915_pci.c b/drivers/gpu/drm/i915/i915_pci.c index 04aaf553e3fa..b73c1eb778d1 100644 --- a/drivers/gpu/drm/i915/i915_pci.c +++ b/drivers/gpu/drm/i915/i915_pci.c @@ -56,6 +56,10 @@ .color = { .degamma_lut_size = 65, .gamma_lut_size = 257 } /* Keep in gen based order, and chronological order within a gen */ + +#define GEN_DEFAULT_PAGE_SIZES \ + .page_size_mask = I915_GTT_PAGE_SIZE_4K + #define GEN2_FEATURES \ .gen = 2, .num_pipes = 1, \ .has_overlay = 1, .overlay_needs_physical = 1, \ @@ -64,6 +68,7 @@ .unfenced_needs_alignment = 1, \ .ring_mask = RENDER_RING, \ GEN_DEFAULT_PIPEOFFSETS, \ + GEN_DEFAULT_PAGE_SIZES, \ CURSOR_OFFSETS static const struct intel_device_info intel_i830_info = { @@ -96,6 +101,7 @@ static const struct intel_device_info intel_i865g_info = { .has_gmch_display = 1, \ .ring_mask = RENDER_RING, \ GEN_DEFAULT_PIPEOFFSETS, \ + GEN_DEFAULT_PAGE_SIZES, \ CURSOR_OFFSETS static const struct intel_device_info intel_i915g_info = { @@ -158,6 +164,7 @@ static const struct intel_device_info intel_pineview_info = { .has_gmch_display = 1, \ .ring_mask = RENDER_RING, \ GEN_DEFAULT_PIPEOFFSETS, \ + GEN_DEFAULT_PAGE_SIZES, \ CURSOR_OFFSETS static const struct intel_device_info intel_i965g_info = { @@ -198,6 +205,7 @@ static const struct intel_device_info intel_gm45_info = { .has_gmbus_irq = 1, \ .ring_mask = RENDER_RING | BSD_RING, \ GEN_DEFAULT_PIPEOFFSETS, \ + GEN_DEFAULT_PAGE_SIZES, \ CURSOR_OFFSETS static const struct intel_device_info intel_ironlake_d_info = { @@ -222,6 +230,7 @@ static const struct intel_device_info intel_ironlake_m_info = { .has_gmbus_irq = 1, \ .has_aliasing_ppgtt = 1, \ GEN_DEFAULT_PIPEOFFSETS, \ + GEN_DEFAULT_PAGE_SIZES, \ CURSOR_OFFSETS static const struct intel_device_info intel_sandybridge_d_info = { @@ -247,6 +256,7 @@ static const struct intel_device_info intel_sandybridge_m_info = { .has_aliasing_ppgtt = 1, \ .has_full_ppgtt = 1, \ GEN_DEFAULT_PIPEOFFSETS, \ + GEN_DEFAULT_PAGE_SIZES, \ IVB_CURSOR_OFFSETS static const struct intel_device_info intel_ivybridge_d_info = { @@ -284,6 +294,7 @@ static const struct intel_device_info intel_valleyview_info = { .has_full_ppgtt = 1, .ring_mask = RENDER_RING | BSD_RING | BLT_RING, .display_mmio_offset = VLV_DISPLAY_BASE, + GEN_DEFAULT_PAGE_SIZES, GEN_DEFAULT_PIPEOFFSETS, CURSOR_OFFSETS }; @@ -308,6 +319,7 @@ static const struct intel_device_info intel_haswell_info = { #define BDW_FEATURES \ HSW_FEATURES, \ BDW_COLORS, \ + GEN_DEFAULT_PAGE_SIZES, \ .has_logical_ring_contexts = 1, \ .has_full_48bit_ppgtt = 1, \ .has_64bit_reloc = 1, \ @@ -345,13 +357,18 @@ static const struct intel_device_info intel_cherryview_info = { .has_full_ppgtt = 1, .has_reset_engine = 1, .display_mmio_offset = VLV_DISPLAY_BASE, + GEN_DEFAULT_PAGE_SIZES, GEN_CHV_PIPEOFFSETS, CURSOR_OFFSETS, CHV_COLORS, }; +#define GEN9_DEFAULT_PAGE_SIZES \ + .page_size_mask = I915_GTT_PAGE_SIZE_4K + #define SKL_PLATFORM \ BDW_FEATURES, \ + GEN9_DEFAULT_PAGE_SIZES, \ .gen = 9, \ .platform = INTEL_SKYLAKE, \ .has_csr = 1, \ @@ -390,6 +407,7 @@ static const struct intel_device_info intel_skylake_gt3_info = { .has_full_ppgtt = 1, \ .has_full_48bit_ppgtt = 1, \ .has_reset_engine = 1, \ + GEN9_DEFAULT_PAGE_SIZES, \ GEN_DEFAULT_PIPEOFFSETS, \ IVB_CURSOR_OFFSETS, \ BDW_COLORS @@ -409,6 +427,7 @@ static const struct intel_device_info intel_geminilake_info = { #define KBL_PLATFORM \ BDW_FEATURES, \ + GEN9_DEFAULT_PAGE_SIZES, \ .gen = 9, \ .platform = INTEL_KABYLAKE, \ .has_csr = 1, \ @@ -444,6 +463,7 @@ static const struct intel_device_info intel_coffeelake_gt3_info = { static const struct intel_device_info intel_cannonlake_info = { BDW_FEATURES, + GEN9_DEFAULT_PAGE_SIZES, \ .is_alpha_support = 1, .platform = INTEL_CANNONLAKE, .gen = 10, diff --git a/drivers/gpu/drm/i915/selftests/mock_gem_device.c b/drivers/gpu/drm/i915/selftests/mock_gem_device.c index 0ac4efd5c7a2..0002ba28780c 100644 --- a/drivers/gpu/drm/i915/selftests/mock_gem_device.c +++ b/drivers/gpu/drm/i915/selftests/mock_gem_device.c @@ -148,6 +148,9 @@ struct drm_i915_private *mock_gem_device(void) mkwrite_device_info(i915)->gen = -1; + mkwrite_device_info(i915)->page_size_mask = + I915_GTT_PAGE_SIZE_4K; + spin_lock_init(&i915->mm.object_stat_lock); mock_uncore_init(i915); -- 2.9.4 _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx