To their rightful place inside intel_workarounds.c

v2: Classify WaDisableSDEUnitClockGating and WaDisableGamClockGating
as GT WAs

v3: Static tables (Joonas)

Signed-off-by: Oscar Mateo <oscar.ma...@intel.com>
Reviewed-by: Chris Wilson <ch...@chris-wilson.co.uk> (v1)
Cc: Rodrigo Vivi <rodrigo.v...@intel.com>
Cc: Mika Kuoppala <mika.kuopp...@linux.intel.com>
Cc: Ville Syrjälä <ville.syrj...@linux.intel.com>
---
 drivers/gpu/drm/i915/intel_pm.c          | 21 +--------------------
 drivers/gpu/drm/i915/intel_workarounds.c | 11 +++++++++++
 2 files changed, 12 insertions(+), 20 deletions(-)

diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
index b5e7432..046553b 100644
--- a/drivers/gpu/drm/i915/intel_pm.c
+++ b/drivers/gpu/drm/i915/intel_pm.c
@@ -8438,23 +8438,6 @@ static void gen8_set_l3sqc_credits(struct 
drm_i915_private *dev_priv,
        I915_WRITE(GEN7_MISCCPCTL, misccpctl);
 }
 
-static void kbl_init_clock_gating(struct drm_i915_private *dev_priv)
-{
-       /* WaDisableSDEUnitClockGating:kbl */
-       if (IS_KBL_REVID(dev_priv, 0, KBL_REVID_B0))
-               I915_WRITE(GEN8_UCGCTL6, I915_READ(GEN8_UCGCTL6) |
-                          GEN8_SDEUNIT_CLOCK_GATE_DISABLE);
-
-       /* WaDisableGamClockGating:kbl */
-       if (IS_KBL_REVID(dev_priv, 0, KBL_REVID_B0))
-               I915_WRITE(GEN6_UCGCTL1, I915_READ(GEN6_UCGCTL1) |
-                          GEN6_GAMUNIT_CLOCK_GATE_DISABLE);
-
-       /* WaFbcNukeOnHostModify:kbl */
-       I915_WRITE(ILK_DPFC_CHICKEN, I915_READ(ILK_DPFC_CHICKEN) |
-                  ILK_DPFC_NUKE_ON_ANY_MODIFICATION);
-}
-
 static void skl_init_clock_gating(struct drm_i915_private *dev_priv)
 {
        /* WAC6entrylatency:skl */
@@ -8915,12 +8898,10 @@ static void nop_init_clock_gating(struct 
drm_i915_private *dev_priv)
 void intel_init_clock_gating_hooks(struct drm_i915_private *dev_priv)
 {
        if (IS_CANNONLAKE(dev_priv) || IS_COFFEELAKE(dev_priv) ||
-           IS_GEMINILAKE(dev_priv))
+           IS_GEMINILAKE(dev_priv) || IS_KABYLAKE(dev_priv))
                dev_priv->display.init_clock_gating = nop_init_clock_gating;
        else if (IS_SKYLAKE(dev_priv))
                dev_priv->display.init_clock_gating = skl_init_clock_gating;
-       else if (IS_KABYLAKE(dev_priv))
-               dev_priv->display.init_clock_gating = kbl_init_clock_gating;
        else if (IS_BROXTON(dev_priv))
                dev_priv->display.init_clock_gating = bxt_init_clock_gating;
        else if (IS_BROADWELL(dev_priv))
diff --git a/drivers/gpu/drm/i915/intel_workarounds.c 
b/drivers/gpu/drm/i915/intel_workarounds.c
index a438ce3..396399b 100644
--- a/drivers/gpu/drm/i915/intel_workarounds.c
+++ b/drivers/gpu/drm/i915/intel_workarounds.c
@@ -745,6 +745,14 @@ static uint mmio_workarounds_apply(struct drm_i915_private 
*dev_priv,
        { WA_GT("WaInPlaceDecompressionHang"),
          ALL_REVS, REG(GEN9_GAMT_ECO_REG_RW_IA),
          SET_BIT(GAMT_ECO_ENABLE_IN_PLACE_DECOMPRESS) },
+
+       { WA_GT("WaDisableSDEUnitClockGating"),
+         REVS(0, KBL_REVID_B0), REG(GEN8_UCGCTL6),
+         SET_BIT(GEN8_SDEUNIT_CLOCK_GATE_DISABLE) },
+
+       { WA_GT("WaDisableGamClockGating"),
+         REVS(0, KBL_REVID_B0), REG(GEN6_UCGCTL1),
+         SET_BIT(GEN6_GAMUNIT_CLOCK_GATE_DISABLE) },
 };
 
 static struct i915_wa_reg glk_gt_was[] = {
@@ -926,6 +934,9 @@ void intel_gt_workarounds_apply(struct drm_i915_private 
*dev_priv)
 };
 
 static struct i915_wa_reg kbl_disp_was[] = {
+       { WA_DISP("WaFbcNukeOnHostModify"),
+         ALL_REVS, REG(ILK_DPFC_CHICKEN),
+         SET_BIT(ILK_DPFC_NUKE_ON_ANY_MODIFICATION) },
 };
 
 static struct i915_wa_reg glk_disp_was[] = {
-- 
1.9.1

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