Revert to the legacy implementation to avoid a system hang.
v2: Correct the address for GAMW_ECO_DEV_RW_IA_REG
v3: Renamed to Wa_220166154
v4: Rebased on top of the WA refactoring
Cc: Mika Kuoppala <mika.kuopp...@linux.intel.com>
Signed-off-by: Oscar Mateo <oscar.ma...@intel.com>
---
drivers/gpu/drm/i915/i915_reg.h | 3 +++
drivers/gpu/drm/i915/intel_workarounds.c | 6 ++++++
2 files changed, 9 insertions(+)
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index 43fdd2e..161d04e 100644
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -8238,6 +8238,9 @@ enum {
#define GEN11_LSN_UNSLCVC_GAFS_HALF_CL2_MACALLOC (1 << 9)
#define GEN11_LSN_UNSLCVC_GAFS_HALF_SF_MAXALLOC (1 << 7)
+#define GAMW_ECO_DEV_RW_IA_REG _MMIO(0x4080)
+#define GAMW_ECO_DEV_CTX_RELOAD_DISABLE (1 << 7)
+
/* IVYBRIDGE DPF */
#define GEN7_L3CDERRST1(slice) _MMIO(0xB008 + (slice) * 0x200) /* L3CD
Error Status 1 */
#define GEN7_L3CDERRST1_ROW_MASK (0x7ff<<14)
diff --git a/drivers/gpu/drm/i915/intel_workarounds.c
b/drivers/gpu/drm/i915/intel_workarounds.c
index 642325a..75fad6f 100644
--- a/drivers/gpu/drm/i915/intel_workarounds.c
+++ b/drivers/gpu/drm/i915/intel_workarounds.c
@@ -739,6 +739,12 @@ static void icl_gt_workarounds_apply(struct
drm_i915_private *dev_priv)
I915_WRITE(GEN11_LSN_UNSLCVC, (I915_READ(GEN11_LSN_UNSLCVC) |
GEN11_LSN_UNSLCVC_GAFS_HALF_SF_MAXALLOC |
GEN11_LSN_UNSLCVC_GAFS_HALF_CL2_MACALLOC));
+
+ /* Wa_220166154:icl
+ * Formerly known as WaDisCtxReload
+ */
+ I915_WRITE(GAMW_ECO_DEV_RW_IA_REG, (I915_READ(GAMW_ECO_DEV_RW_IA_REG) |
+ GAMW_ECO_DEV_CTX_RELOAD_DISABLE));
}
void intel_gt_workarounds_apply(struct drm_i915_private *dev_priv)
--
1.9.1
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