If we are not running with a scheduler, we are using a global ringbuffer
which may not accommodate 16 extra batches. Fortunately, we only need
one such batch to block the submission queue as without a scheduler, it
is in order submission (and so the batch is after the main setup
anyway!).
Signed-off-by: Chris Wilson <ch...@chris-wilson.co.uk>
---
tests/i915/gem_exec_schedule.c | 9 +++++++--
1 file changed, 7 insertions(+), 2 deletions(-)
diff --git a/tests/i915/gem_exec_schedule.c b/tests/i915/gem_exec_schedule.c
index 6e8466299..058102103 100644
--- a/tests/i915/gem_exec_schedule.c
+++ b/tests/i915/gem_exec_schedule.c
@@ -164,8 +164,13 @@ static uint32_t create_highest_priority(int fd)
static void unplug_show_queue(int fd, struct igt_cork *c, unsigned int engine)
{
igt_spin_t *spin[MAX_ELSP_QLEN];
+ int max = MAX_ELSP_QLEN;
- for (int n = 0; n < ARRAY_SIZE(spin); n++) {
+ /* If no scheduler, all batches are emitted in submission order */
+ if (!gem_scheduler_enabled(fd))
+ max = 1;
+
+ for (int n = 0; n < max; n++) {
const struct igt_spin_factory opts = {
.ctx = create_highest_priority(fd),
.engine = engine,
@@ -177,7 +182,7 @@ static void unplug_show_queue(int fd, struct igt_cork *c,
unsigned int engine)
igt_cork_unplug(c); /* batches will now be queued on the engine */
igt_debugfs_dump(fd, "i915_engine_info");
- for (int n = 0; n < ARRAY_SIZE(spin); n++)
+ for (int n = 0; n < max; n++)
igt_spin_free(fd, spin[n]);
}
--
2.23.0.rc1
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