Quoting Mika Kuoppala (2020-05-06 16:20:22) > Chris Wilson <ch...@chris-wilson.co.uk> writes: > > > Quoting Mika Kuoppala (2020-05-06 15:47:34) > >> Aux table invalidation can fail on update. So > >> next access may cause memory access to be into stale entry. > >> > >> Proposed workaround is to invalidate entries between > >> all batchbuffers. > > > > This sounds like it should have a sunset clause. Do we anticipate being > > able to drop this w/a in future? > > Rafael kindly pointed out that Mesa already does this: > https://gitlab.freedesktop.org/mesa/mesa/-/blob/master/src/gallium/drivers/iris/iris_state.c#L5131 > So I would say we can drop this patch.
Is the false hit self-contained? Is it caused by PTE update of the address or by a 3D state change i.e. is it a potential isolation issue? -Chris _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
