> -----Original Message-----
> From: Intel-gfx <intel-gfx-boun...@lists.freedesktop.org> On Behalf Of
> Lucas De Marchi
> Sent: Thursday, July 2, 2020 5:24 AM
> To: intel-gfx@lists.freedesktop.org
> Subject: [Intel-gfx] [PATCH v3 19/28] drm/i915/dg1: Don't program
> PHY_MISC for PHY-C and PHY-D
>
> From: Matt Roper <matthew.d.ro...@intel.com>
Reviewed-by: Anusha Srivatsa <anusha.sriva...@intel.com>
>
> The only bit we use in PHY_MISC is DE_IO_COMP_PWR_DOWN, and the
> bspec details for that bit tell us that it need only be set for PHY-A and PHY-
> B. It also turns out that there isn't even an instance of the PHY_MISC
> register for PHY-D on this platform. Let's extend the EHL/RKL logic that
> conditionally skips PHY_MISC usage to DG1 as well.
>
> Bspec: 50107
> Cc: Aditya Swarup <aditya.swa...@intel.com>
> Cc: Clinton Taylor <clinton.a.tay...@intel.com>
> Signed-off-by: Matt Roper <matthew.d.ro...@intel.com>
> Signed-off-by: Lucas De Marchi <lucas.demar...@intel.com>
> ---
> drivers/gpu/drm/i915/display/intel_combo_phy.c | 3 ++-
> 1 file changed, 2 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_combo_phy.c
> b/drivers/gpu/drm/i915/display/intel_combo_phy.c
> index 77b04bb3ec62..8604d4392e6a 100644
> --- a/drivers/gpu/drm/i915/display/intel_combo_phy.c
> +++ b/drivers/gpu/drm/i915/display/intel_combo_phy.c
> @@ -189,7 +189,8 @@ static bool has_phy_misc(struct drm_i915_private
> *i915, enum phy phy)
> * other combo PHY's.
> */
> if (IS_ELKHARTLAKE(i915) ||
> - IS_ROCKETLAKE(i915))
> + IS_ROCKETLAKE(i915) ||
> + IS_DG1(i915))
> return phy < PHY_C;
>
> return true;
> --
> 2.26.2
>
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