Use drm_clflush_virt_range instead of directly invoking clflush. This
will prevent compiler errors when building for non-x86 architectures.

v2(Michael Cheng): Remove extra clflush

v3(Michael Cheng): Remove memory barrier since drm_clflush_virt_range
                   takes care of it.

Signed-off-by: Michael Cheng <michael.ch...@intel.com>
---
 drivers/gpu/drm/i915/gt/intel_execlists_submission.c | 5 ++---
 1 file changed, 2 insertions(+), 3 deletions(-)

diff --git a/drivers/gpu/drm/i915/gt/intel_execlists_submission.c 
b/drivers/gpu/drm/i915/gt/intel_execlists_submission.c
index 28f2581d3046..cc561cfae808 100644
--- a/drivers/gpu/drm/i915/gt/intel_execlists_submission.c
+++ b/drivers/gpu/drm/i915/gt/intel_execlists_submission.c
@@ -2944,9 +2944,8 @@ reset_csb(struct intel_engine_cs *engine, struct 
i915_request **inactive)
 {
        struct intel_engine_execlists * const execlists = &engine->execlists;
 
-       mb(); /* paranoia: read the CSB pointers from after the reset */
-       clflush(execlists->csb_write);
-       mb();
+       drm_clflush_virt_range(execlists->csb_write,
+                       sizeof(execlists->csb_write));
 
        inactive = process_csb(engine, inactive); /* drain preemption events */
 
-- 
2.25.1

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