[Intel-gfx] ✗ Fi.CI.SPARSE: warning for series starting with [CI,v3,1/3] drm/i915/display/tgl+: Set default values for all registers in PIPE_MBUS_DBOX_CTL

[Patchwork]

== Series Details ==

Series: series starting with [CI,v3,1/3] drm/i915/display/tgl+: Set default 
values for all registers in PIPE_MBUS_DBOX_CTL
URL   : https://patchwork.freedesktop.org/series/101965/
State : warning

== Summary ==

$ dim sparse --fast origin/drm-tip
Sparse version: v0.6.2
Fast mode used, each commit won't be checked separately.