When enabling Early Transport use
intel_crtc_state->enable_psr2_su_region_et instead of
psr2_su_region_et_valid.

Fixes: 467e4e061c44 ("drm/i915/psr: Enable psr2 early transport as possible")
Signed-off-by: Jouni Högander <jouni.hogan...@intel.com>
---
 drivers/gpu/drm/i915/display/intel_psr.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/i915/display/intel_psr.c 
b/drivers/gpu/drm/i915/display/intel_psr.c
index 1e55d447481a..605ca6b6321d 100644
--- a/drivers/gpu/drm/i915/display/intel_psr.c
+++ b/drivers/gpu/drm/i915/display/intel_psr.c
@@ -709,7 +709,7 @@ void intel_psr_enable_sink(struct intel_dp *intel_dp,
                                           DP_ALPM_ENABLE |
                                           DP_ALPM_LOCK_ERROR_IRQ_HPD_ENABLE);
 
-                       if (psr2_su_region_et_valid(intel_dp))
+                       if (crtc_state->enable_psr2_su_region_et)
                                dpcd_val |= DP_PSR_ENABLE_SU_REGION_ET;
                }
 
-- 
2.34.1

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