> -----Original Message-----
> From: Borah, Chaitanya Kumar <[email protected]>
> Sent: Tuesday, April 8, 2025 4:30 PM
> To: [email protected]; [email protected]
> Cc: [email protected]; Shankar, Uma <[email protected]>;
> Borah, Chaitanya Kumar <[email protected]>; Manna,
> Animesh <[email protected]>
> Subject: [PATCH 02/11] drm/i915/dsb: Extract assert_dsb_tail_is_aligned()
> 
> From: Ville Syrjälä <[email protected]>
> 
> Extract the DSB tail alignment checks into helper. We already have two uses
> of this, and soo we'll get a third.

Typo soon.
> 
> Signed-off-by: Ville Syrjälä <[email protected]>

Other changes LGTM.
Reviewed-by: Animesh Manna <[email protected]>


> ---
>  drivers/gpu/drm/i915/display/intel_dsb.c | 19 +++++++++++++++----
>  1 file changed, 15 insertions(+), 4 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_dsb.c
> b/drivers/gpu/drm/i915/display/intel_dsb.c
> index c166e02b8af0..08e3bbea1a67 100644
> --- a/drivers/gpu/drm/i915/display/intel_dsb.c
> +++ b/drivers/gpu/drm/i915/display/intel_dsb.c
> @@ -204,6 +204,15 @@ static bool assert_dsb_has_room(struct intel_dsb
> *dsb)
>                        crtc->base.base.id, crtc->base.name, dsb->id);  }
> 
> +static bool assert_dsb_tail_is_aligned(struct intel_dsb *dsb) {
> +     struct intel_crtc *crtc = dsb->crtc;
> +     struct intel_display *display = to_intel_display(crtc->base.dev);
> +
> +     return !drm_WARN_ON(display->drm,
> +                         !IS_ALIGNED(dsb->free_pos * 4,
> CACHELINE_BYTES)); }
> +
>  static void intel_dsb_dump(struct intel_dsb *dsb)  {
>       struct intel_crtc *crtc = dsb->crtc;
> @@ -621,10 +630,11 @@ static void _intel_dsb_chain(struct
> intel_atomic_state *state,
>       if (drm_WARN_ON(display->drm, dsb->id == chained_dsb->id))
>               return;
> 
> -     tail = chained_dsb->free_pos * 4;
> -     if (drm_WARN_ON(display->drm, !IS_ALIGNED(tail,
> CACHELINE_BYTES)))
> +     if (!assert_dsb_tail_is_aligned(chained_dsb))
>               return;
> 
> +     tail = chained_dsb->free_pos * 4;
> +
>       intel_dsb_reg_write(dsb, DSB_CTRL(pipe, chained_dsb->id),
>                           ctrl | DSB_ENABLE);
> 
> @@ -695,10 +705,11 @@ static void _intel_dsb_commit(struct intel_dsb
> *dsb, u32 ctrl,
>       enum pipe pipe = crtc->pipe;
>       u32 tail;
> 
> -     tail = dsb->free_pos * 4;
> -     if (drm_WARN_ON(display->drm, !IS_ALIGNED(tail,
> CACHELINE_BYTES)))
> +     if (!assert_dsb_tail_is_aligned(dsb))
>               return;
> 
> +     tail = dsb->free_pos * 4;
> +
>       if (is_dsb_busy(display, pipe, dsb->id)) {
>               drm_err(display->drm, "[CRTC:%d:%s] DSB %d is busy\n",
>                       crtc->base.base.id, crtc->base.name, dsb->id);
> --
> 2.25.1

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